CY7C0851V CYPRESS [Cypress Semiconductor], CY7C0851V Datasheet - Page 27

• Manufacturer Part Number: CY7C0851V
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Notes
Document Number: 38-06070 Rev. *L
51. CE
52. This timing is valid when one port is writing, and other port is reading the same location at the same time. If t
53. If t
If t
CLK
L_PORT
ADDRESS
R/W
L_PORT
DATA
CLK
R_PORT
ADDRESS
R/W
R_PORT
DATA
CCS
CCS
0
= OE = ADS = CNTEN = B0 – B3 = LOW; CE
L
L
R
R
< minimum specified value, then R_Port is Read the most recent data (written by L_Port) only (2 * t
> minimum specified value, then R_Port is Read the most recent data (written by L_Port) (t
IN
OUT
t
CKHZ
t
CH2
t
t
CH2
CYC2
Figure 21. Left_Port (L_Port) Write to Right_Port (R_Port) Read
t
t
CYC2
CL2
t
(continued)
SW
t
t
SD
SA
t
CL2
D
A
n
n
1
t
HA
= CNTRST = MRST = CNT/MSK = HIGH.
t
CCS
t
SA
t
HW
t
HD
A
n
t
HA
t
CKLZ
t
DC
t
CD2
CYC2
+ t
CYC2
CD2
CCS
) after the rising edge of R_Port's clock.
CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
Q
+ t
n
is violated, indeterminate data is Read out.
CD2
) after the rising edge of R_Port's clock.
[51, 52, 53]
Page 27 of 39