MT44K16M36 MICRON [Micron Technology], MT44K16M36 Datasheet - Page 63

• Manufacturer Part Number: MT44K16M36
• Description: 576Mb: x18, x36 RLDRAM 3
• Manufacturer: MICRON [Micron Technology]

MODE REGISTER SET (MRS) Command
Figure 30: MRS Command Protocol
PDF: 09005aef84003617
576mb_rldram3.pdf – Rev. B 1/12 EN
The mode registers, MR0, MR1, and MR2, store the data for controlling the operating
modes of the memory. The MODE REGISTER SET (MRS) command programs the
RLDRAM 3 operating modes and I/O options. During an MRS command, the address
inputs are sampled and stored in the mode registers. The BA[1:0] signals select between
mode registers 0–2 (MR0–MR2). After the MRS command is issued, each mode register
retains the stored information until it is reprogrammed, until RESET# goes LOW, or un-
til the device loses power.
After issuing a valid MRS command,
issued to the RLDRAM 3. The MRS command can be issued only when all banks are
idle, and no bursts are in progress.
Address
Address
Bank
REF#
WE#
CK#
CS#
CK
OPCODE
OPCODE
Don’t Care
63
MODE REGISTER SET (MRS) Command
t
MRSC must be met before any command can be
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576Mb: x18, x36 RLDRAM 3
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