PCF8523 NXP [NXP Semiconductors], PCF8523 Datasheet - Page 38

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PCF8523

Manufacturer Part Number
PCF8523
Description
Real-Time Clock (RTC) and calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
PCF8523
Product data sheet
8.9.5 Timer interrupt pulse
The timer interrupt is generated as a pulsed signal when TAM or TBM are set logic 1. The
pulse generator for the timer interrupt also uses an internal clock, but this time it is
dependent on the selected source clock for the timer and on the timer register value n.
Consequently, the width of the interrupt pulse varies; see
Table 41.
Pulse mode, bit TAM set logic 1.
[1]
For timer B, interrupt pulse width is programmable via bit TBW (register Tmr_B_freq_ctrl).
Source clock (Hz)
4096
64
1
1
1
Fig 21. Example for second interrupt when TAM = 1
Fig 22. Example for second interrupt when TAM = 0
60
3600
n = loaded timer register value. Timer stops when n = 0.
INT1 when SIE enabled
SF when SIE enabled
In this example, bit TAM is set logic 1 and the SF flag is not cleared after an interrupt.
In this example, bit TAM is set logic 0 and the SF flag is cleared after an interrupt.
INT1 when SIE enabled
Interrupt low pulse width for timer A
SF when SIE enabled
seconds counter
minutes counter
seconds counter
minutes counter
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 30 March 2011
58
Interrupt pulse width
n = 1
122 s
7.812 ms
15.625 ms
15.625 ms
15.625 ms
58
59
59
[1]
59
11
59
11
Real-Time Clock (RTC) and calendar
00
12
00
12
Table 41
n > 1
244 s
15.625 ms
15.625 ms
15.625 ms
15.625 ms
00
[1]
00
and
01
PCF8523
© NXP B.V. 2011. All rights reserved.
Table
01
013aaa332
013aaa331
42.
38 of 66

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