UDA1343 PHILIPS [NXP Semiconductors], UDA1343 Datasheet - Page 13

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UDA1343

Manufacturer Part Number
UDA1343
Description
Economy audio CODEC with features
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors
Data write mode
For writing data to a device four bytes must be sent.
The data write mode is illustrated in Fig.8.
1. One byte with the device address including ‘01’ for
2. One byte starting with a logic 0 for signalling write
3. Two data bytes.
Notes:
1. Each time a new destination address needs to be
2. When addressing the device for the first time after
Data read mode
For reading from the device, a prepare-read must first be
done. After the prepare-read, the device address is sent
again. The device then returns with the register address,
indicating whether the address was valid or not, and the
data of the register. This procedure is explained below,
and an example transmission is illustrated in Fig.9.
2000 Jan 12
handbook, full pagewidth
Economy audio CODEC with features
signalling write to the device.
followed by 7 bits indicating the destination address.
written, the device address must sent again.
power-up of the device, at least one L3 clock cycle
must be sent to enable the L3 interface.
L3CLOCK
L3MODE
L3DATA
t h(L3)A
BIT 0
t su(L3)A
t su(L3)DA
Fig.6 Timing address mode.
t CLK(L3)H
t CLK(L3)L
13
1. One byte with the device address including ‘01’ for
2. One byte is sent with the register address which needs
3. One byte with the device address including ‘11’ is sent
4. The device now writes the requested register address
5. The device writes the data from the requested register
t h(L3)DA
signalling write to the address.
to be read. This byte starts with a logic 1, which
indicated that there will be a read action from the
register.
to the device. The ‘11’ indicates that the device must
write data to the microcontroller.
to the bus, indicating whether the requested register
was valid or not (logic 0 means valid, logic 1 means
invalid).
to the bus (two bytes).
T cy(CLK)(L3)
BIT 7
t su(L3)A
t h(L3)A
Preliminary specification
UDA1343TT
MGL723

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