TDA9899HL NXP [NXP Semiconductors], TDA9899HL Datasheet - Page 20

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TDA9899HL

Manufacturer Part Number
TDA9899HL
Description
Multistandard hybrid IF processing including car mobile
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
TDA9899_3
Product data sheet
Fig 6. I
S
2
C-bus write format (slave receives data)
slave address
A6 to A0
9.2 Write format
BYTE 1
from master to slave
from slave to master
Table 11.
[1]
Bit
VAGC5
R2[5]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
The reference of 0 (TOP) can be adjusted via TOPPOS[4:0] (register W10; see
via potentiometer at pin TOP2.
0
A
AGC bits (for corresponding AGC characteristic see
VAGC4
R2[4]
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
subaddress
A7 to A0
BYTE 2
Rev. 03 — 15 January 2008
VAGC3
R2[3]
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Multistandard hybrid IF processing including car mobile
A
VAGC2
R2[2]
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
bits 7 to 0
BYTE 3
data 1
VAGC1
R2[1]
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
A
S = START condition
A = acknowledge
P = STOP condition
Figure
bits 7 to 0
BYTE n
data n
VAGC0
R2[0]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Table 51
10)
TDA9899
© NXP B.V. 2008. All rights reserved.
…continued
and
A
Typical
(V)
1.56
1.60
1.64
1.68
1.72
1.76
1.80
1.84
1.88
1.92
1.96
2.00
2.04
2.08
2.12
2.16
2.20
2.24
2.28
2.32
2.36
2.40
2.44
2.48
2.52
V
Table
AGC(VIF)
001aad166
20 of 103
49) or
P

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