TDA9899HL NXP [NXP Semiconductors], TDA9899HL Datasheet - Page 60
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TDA9899HL
Manufacturer Part Number
TDA9899HL
Description
Multistandard hybrid IF processing including car mobile
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.TDA9899HL.pdf
(103 pages)
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Quantity
Price
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Part Number:
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NXP Semiconductors
Table 55.
V
f
for L); IF input from 50
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of
otherwise specified.
TDA9899_3
Product data sheet
Symbol
Reference frequency output; W7[7] = 1; pin FREF
V
R
V
f
I
I
I
I
Address select; pin ADRSEL
V
R
R
I
V
I
I
V
I
V
SC
bias(int)
sink(o)(max)
source(o)(max)
2
2
sink(I)
source(I)
2
P
FREF
o(fref)(p-p)
3dB(u)
C-bus transceiver
ADRSEL
C-bus voltage select; pin BVS
BVS
I
C-bus transceiver; pins SCL and SDA
IH
O
i
ADRSEL
= 5 V; T
= 32.875 MHz; PC / SC = 13 dB; f
amb
Characteristics
= 25 C; see
Parameter
voltage on pin FREF (DC)
output resistance
peak-to-peak reference
frequency output voltage
upper cut-off frequency
internal bias current (DC)
maximum output sink current AC and DC
maximum output source
current
voltage on pin ADRSEL (DC) pin open-circuit
input resistance
resistance on pin ADRSEL
voltage on pin BVS (DC)
input sink current
input source current
input voltage
HIGH-level input voltage
[28]
via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
Table 26
…continued
for input frequencies; B/G standard is used for the specification (f
AF
[29]
= 400 Hz); input level V
Rev. 03 — 15 January 2008
Conditions
pin open-circuit
pin open-circuit
of emitter follower
AC and DC
for address select
pin open-circuit
pin connected to V
pin connected to GND
V
connected to V
V
open-circuit
V
connected to GND
V
V
V
CC(I2C-bus)
CC(I2C-bus)
CC(I2C-bus)
CC(I2C-bus)
CC(I2C-bus)
CC(I2C-bus)
MAD1; pin connected
to GND
MAD3; pin connected
to GND via R
MAD4; pin connected
to V
MAD2; pin connected
to V
P
P
Multistandard hybrid IF processing including car mobile
via R
= 5.0 V; pin
= 3.3 V; pin
= 2.5 V; pin
= 5.0 V
= 3.3 V
= 2.5 V
ADRSEL
i(IF)
P
ADRSEL
= 10 mV (RMS) (sync level for B/G; peak white level
P
[30]
[31]
[31]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
Min
2.3
200
200
4
150
100
430
-
0
0.12V
0.66V
0.96V
-
42.3
-
-
-
0.88V
0.46V
0
0.6V
2.3
1.75
P
P
P
P
P
P
Typ
2.6
350
300
8
200
-
-
0.5V
-
-
-
-
35
47
0.52V
-
-
-
-
-
-
-
-
P
Figure
P
PC
TDA9899
© NXP B.V. 2008. All rights reserved.
= 38.375 MHz;
Max
2.9
500
360
12
-
-
-
-
0.04V
0.30V
0.86V
V
-
51.7
-
10
60
V
0.58V
0.12V
V
V
V
P
P
P
P
P
49; unless
P
P
P
P
P
Unit
V
mV
MHz
V
V
V
V
V
k
k
V
V
V
V
V
V
V
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