TDA9899HL NXP [NXP Semiconductors], TDA9899HL Datasheet - Page 87
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TDA9899HL
Manufacturer Part Number
TDA9899HL
Description
Multistandard hybrid IF processing including car mobile
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.TDA9899HL.pdf
(103 pages)
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NXP Semiconductors
TDA9899_3
Product data sheet
Table 59.
[1]
[2]
f
22 to 29.5
30 to 37.5
38 to 45.5
46 to 53.5
57
VCO
Fig 37. Maximum differential load figures at OUT1/OUT2
Calculation of the PLL loop filter by using the following formulae, valid under the condition for the damping
factor d
parameters
K
N = divider ratio:
K
R
C
B
d = damping factor.
If more than one frequency range is used in the application, then the smallest resistor value should be
applied.
(1) Direct IF, f
(2) Low IF, f
(3) Zero IF, f
(MHz)
O
D
LFSYN2
LFSYN2
LF( 3dB)
= VCO steepness (MHz/V),
= phase frequency detector steepness ( A/rad),
W4[7] = 0; nominal output level
Conversion synthesizer PLL; loop filter dimensions
= synthesizer loop filter serial resistor ( ),
= synthesizer loop filter serial capacitor (F),
= 3 dB LF bandwidth (Hz),
1.2.
max
max
B
max
LF
N
= 9 MHz.
= 4 MHz.
= 40 MHz, with single-ended resistors of 1 k to GND.
–
=
3dB
C
(pF)
Rev. 03 — 15 January 2008
L(dif)
------------------- -
0.5 MHz
30
20
10
f
VCO
0
=
0
K
------ -K
N
O
Multistandard hybrid IF processing including car mobile
,
R
1.5
1.8
2.2
2.7
3.3
LFSYN2
D
R
LFSYN2
(k )
1
and
[2]
d
=
1
-- - R
2
2
LFSYN2
R
(3)
(2)
(1)
L(dif)
001aah343
(k )
2
C
4.7
4.7
4.7
4.7
4.7
K
------ -K
[1]
N
LFSYN2
O
3
D
C
LFSYN2
(nF)
TDA9899
© NXP B.V. 2008. All rights reserved.
with the following
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