DAC1401D125HL NXP [NXP Semiconductors], DAC1401D125HL Datasheet - Page 18

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DAC1401D125HL

Manufacturer Part Number
DAC1401D125HL
Description
Dual 14-bit DAC, up to 125 Msps
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
DAC1401D125_1
Product data sheet
10.5 Full-scale current adjustment
Table 7
Table 7.
The DAC1401D125 integrates one 1.25 V reference and two current sources to adjust the
full-scale current in both DACs.
The internal reference configuration is shown in
The bias current is generated by the output of the internal regulator connected to the
inverting input of the internal operational amplifiers. The external resistors R
connected to pins AVIRES and BVIRES, respectively. This configuration is optimal for
temperature drift compensation because the bandgap can be matched with the voltage on
the feedback resistors.
The relationship between full-scale output current (I
channel B and the resistor is:
The output current of the two DACs is typically fixed at 20 mA when both resistors R
R
It is recommended to decouple pin REFIO using a 100 nF capacitor.
I
Data
0
...
8192
...
16383
O fs
Fig 19. Internal reference configuration
B
are set to 1.5 k . The operational range of DAC1401D125 is from 2 mA to 20 mA.
=
shows the output current as a function of the input data, when I
24V
------------------------ -
DAC transfer function
R
REFIO
DA13/DB13 to DA0/DB0
00 0000 0000 0000
...
10 0000 0000 0000
...
11 1111 1111 1111
A
Rev. 01 — 13 November 2008
CURRENT
CURRENT
1.25 V REFERENCE
SOURCE
SOURCE
IOUTAP/IOUTBP
0 mA
...
10 mA
...
20 mA
Figure
AVIRES
REFIO
BVIRES
O(fs)
AGND
AGND
AGND
001aai822
Dual 14-bit DAC, up to 125 Msps
19.
) at the output of channel A or
R A
R B
100 nF
DAC1401D125
IOUTAN/IOUTBN
20 mA
...
10 mA
...
0 mA
O(fs)
© NXP B.V. 2008. All rights reserved.
= 20 mA.
A
and R
18 of 25
A
B
and
are
(2)

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