ADSP-2191 AD [Analog Devices], ADSP-2191 Datasheet - Page 22

• Manufacturer Part Number: ADSP-2191
• Description: DSP Microcomputer
• Manufacturer: AD [Analog Devices]

ADSP-2191M
Programmable Flags Cycle Timing
Table 10
Table 10. Programmable Flags Cycle Timing
Timer PWM_OUT Cycle Timing
Table 11
absolute maximum input frequency of 40 MHz.
Table 11. Timer PWM_OUT Cycle Timing
1
The minimum time for t
Parameter
Switching Characteristics
t
t
Timing Requirement
t
Parameter
Switching Characteristic
t
DFO
HFO
HFI
HTO
and
and
P W M _OUT
(OUTPUT)
CLKOUT
(INPUT)
Figure 9
Figure 10
HCLK
Flag Output Delay with Respect to CLKOUT
Flag Output Hold After CLKOUT High
Flag Input Hold is asynchronous
PF
Timer Pulsewidth Output
PF
HTO
describe Programmable Flag operations.
describe timer expired operations. The input signal is asynchronous in “width capture mode” and has an
is one cycle, and the maximum time for t
1
Figure 9. Programmable Flags Cycle Timing
Figure 10. Timer PWM_OUT Cycle Timing
t
DFO
HTO
–22–
FLAG INPUT
equals (2
t
FLAG OUTPUT
HFI
32
t
H T O
–1) cycles.
t
HFO
Min
12.5
Min
3
Max
(2
Max
7
6
32
–1) cycles
REV. 0
Unit
ns
ns
ns
Unit
ns