ADSP-2191 AD [Analog Devices], ADSP-2191 Datasheet - Page 38

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ADSP-2191

Manufacturer Part Number
ADSP-2191
Description
DSP Microcomputer
Manufacturer
AD [Analog Devices]
Datasheet

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ADSP-2191M
Serial Peripheral Interface (SPI) Port—Slave Timing
Table 21
Table 21. Serial Peripheral Interface (SPI) Port—Slave Timing
Parameter
Switching Characteristics
t
t
t
t
Timing Requirements
t
t
t
t
t
t
t
t
DSOE
DSDHI
DDSPID
HDSPID
SPICHS
SPICLS
SPICLK
HDS
SPITDS
SDSCI
SSPID
HSPID
CPHA = 1
CPHA = 0
and
(CPOL = 1)
(CPOL = 0)
(OUTPUT)
(OUTPUT)
Figure 22
(INPUT)
(INPUT)
(INPUT)
(INPUT)
(INPUT)
SPISS
SCLK
SCLK
MOSI
MOSI
SPISS Assertion to Data Out Active
SPISS Deassertion to Data High Impedance
SCLK Edge to Data Out Valid (Data Out Delay)
SCLK Edge to Data Out Invalid (Data Out Hold)
Serial Clock High Period
Serial Clock Low Period
Serial Clock Period
Last SPICLK Edge to SPISS Not Asserted
Sequential Transfer Delay
SPISS Assertion to First SPICLK Edge
Data Input Valid to SCLK Edge (Data Input Setup)
SCLK Sampling Edge to Data Input Invalid (Data In Hold)
MISO
MISO
t
t
DSOE
DSOE
describe SPI port slave operations.
t
SDSCI
t
t
SPICHS
SPICLS
Figure 22. Serial Peripheral Interface (SPI) Port—Slave Timing
t
SSPID
t
VALID
DDSPID
MSB
MSB
VALID
t
MSB
DDSPID
MSB
t
HDSPID
t
HSPID
t
t
SPICHS
SPICLS
–38–
t
SSPID
t
DDSPID
VALID
LSB
t
t
SPICLK
SSPID
LSB
VALID
LSB
t
HSPID
Min
0
0
0
0
2t
2t
4t
2t
2t
2t
1.6
2.4
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
t
t
t
HDS
DSDHI
DSDHI
LSB
t
HSPID
+4
t
SPITDS
Max
8
10
10
10
REV. 0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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