SAA7374GP PHILIPS [NXP Semiconductors], SAA7374GP Datasheet - Page 10

• Manufacturer Part Number: SAA7374GP
• Description: Low voltage digital servo processor and Compact Disc decoder CD7LV
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
7.4
7.4.1
A double timing system is used to protect the demodulator
from erroneous sync patterns in the serial data. The
master counter is only reset if;
The sync coincidence signal is also used to generate the
PLL lock signal, which is active HIGH after 1 sync
coincidence found, and reset LOW if during 61
consecutive frames no sync coincidence is found.
1998 Feb 26
handbook, full pagewidth
A sync coincidence detected; sync pattern occurs 588
A new sync pattern is detected within 6 EFM clocks of
its expected position.
Low voltage digital servo processor and
Compact Disc decoder (CD7LV)
1 EFM clocks after the previous sync pattern.
Demodulator
F
RAME SYNC PROTECTION
input
HF
Fig.5 Data slicer showing typical application components (for n = 1).
2.2 nF
100 nF
2.2 k
22 k
V SSA
150
k
V SSA
47 pF
nF
22
V SSA
HFREF
ISLICE
HFIN
I ref
10
1/2V DD
The PLL lock signal can be accessed via the SDA or
STATUS pins selected by register 2 and 7.
Also incorporated in the demodulator is a RL2 (Run
Length 2) correction circuit. Every symbol detected as RL2
will be pushed back to RL3. To do this the phase error of
both edges of the RL2 symbol are compared and the
correction is executed at the side with the highest error
probability.
7.4.2
The 14-bit EFM data and subcode words are decoded into
8-bit symbols.
100 A
100 A
EFM
D
crystal
clock
DEMODULATION
V SS
V
DD
Q
MBG649
DPLL
Product specification
SAA7374