STA2500DTR STMICROELECTRONICS [STMicroelectronics], STA2500DTR Datasheet - Page 9

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STA2500DTR

Manufacturer Part Number
STA2500DTR
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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STA2500D
Table 8.
1. Equivalent to max 10 ps time jitter (rms).
Table 9.
Table 10.
1. Equivalent to max 15 ps time jitter (rms).
Table 11.
Symbol
Symbol
Symbol
Symbol
D
Z
Z
Z
Z
T
T
V
V
CYCLE
N
INRe
IDRe
C
V
F
V
INIm
IDim
V
V
RISE
FALL
PP
hyst
-
-
-
H
IH
IN
IH
IL
IN
IL
Peak to peak voltage range
Total harmonic content of input signal
Real part of parallel input impedance at pin
Imaginary part of parallel input impedance at pin
Real impedance discrepancy between active and non-
active mode of clock input
Imaginary impedance discrepancy between active and
non-active mode of clock input
Phase noise @ 10 kHz
System clock, sine wave specifications
System clock, digital clock DC specifications
System clock, digital clock AC specifications
Low power clock specifications
The low power clock pin is powered by connecting BT_VIO_B to the wanted supply.
Low level input voltage
High level input voltage
Input capacitance
10% - 90% rise time
90% - 10% fall time
Duty cycle
Phase noise @ 10 kHz
Clock input frequencies
Duty cycle
Tolerance on input frequency
Low level input voltage
High level input voltage
Schmitt trigger hysteresis (BT_VIO_B = 1.8 V)
Parameter
Parameter
Parameter
Parameter
(1)
(1)
Doc ID 16067 Rev 1
BT_VDD_CLD
BT_VIO_B
0.65 *
0.65 *
−250
Min.
Min.
Min.
-0.2
0.4
45
30
-
-
-
-
-
Min.
0.27
30
-
-
-
-
-
3.2, 32, 32.768
Typ.
Typ.
Typ.
1.5
1.5
0.5
50
5
-
-
Typ.
-
-
-
-
-
0.5
60
5
-
-
-
-
Quick reference data
(BT_VDD_CLD
BT_VDD_CLD
BT_VIO_B
+ 0.2) and
Max.
-121
(≤ 2.85)
Max.
-126
0.35 *
55
0.35 *
500
Max.
1.8
-25
6
6
Max.
90
250
8
7
0.6
70
8
-
dBc/Hz
dBc/Hz
Unit
Unit
dBc
pF
ns
ns
fF
%
V
Unit
Unit
ppm
kHz
pF
%
V
V
V
V
V
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