PIC12F1822 MICROCHIP [Microchip Technology], PIC12F1822 Datasheet - Page 112

• Manufacturer Part Number: PIC12F1822
• Description: 8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12F/LF1822/16F/LF1823
11.4
When modifying existing data in a program memory
row, and data within that row must be preserved, it must
first be read and saved in a RAM image. Program
memory is modified using the following steps:
1.
2.
3.
4.
5.
6.
7.
8.
TABLE 11-2:
EXAMPLE 11-3:
DS41413A-page 112
* This code block will read 1 word of program memory at the memory address:
*
*
Load the starting address of the row to be mod-
ified.
Read the existing data from the row into a RAM
image.
Modify the RAM image to contain the new data
to be written into program memory.
Load the starting address of the row to be rewrit-
ten.
Erase the program memory row.
Load the write latches with data from the RAM
image.
Initiate a programming operation.
Repeat steps 6 and 7 as many times as required
to reprogram the erased row.
PROG_ADDR_LO (must be 00h-08h) data will be returned in the variables;
PROG_DATA_HI, PROG_DATA_LO
BANKSEL
MOVLW
MOVWF
CLRF
BSF
BCF
BSF
NOP
NOP
BSF
MOVF
MOVWF
MOVF
MOVWF
Modifying Flash Program Memory
8000h-8003h
8007h-8008h
Address
8006h
EEADRL
PROG_ADDR_LO
EEADRL
EEADRH
EECON1,CFGS
INTCON,GIE
EECON1,RD
INTCON,GIE
EEDATL,W
PROG_DATA_LO
EEDATH,W
PROG_DATA_HI
USER ID, DEVICE ID AND CONFIGURATION WORD ACCESS (CFGS = 1)
CONFIGURATION WORD AND DEVICE ID ACCESS
Configuration Words 1 and 2
Device ID/Revision ID
; Select correct Bank
;
; Store LSB of address
; Clear MSB of address
; Select Configuration Space
; Disable interrupts
; Initiate read
; Executed (See Figure 11-1)
; Ignored (See Figure 11-1)
; Restore interrupts
; Get LSB of word
; Store in user location
; Get MSB of word
; Store in user location
Function
User IDs
Preliminary
11.5
Instead of accessing program memory or EEPROM
data memory, the User ID’s, Device ID/Revision ID and
Configuration Words can be accessed when CFGS = 1
in the EECON1 register. This is the region that would
be pointed to by PC<15> = 1, but not all addresses are
accessible. Different access may exist for reads and
writes. Refer to Table 11-2.
When read access is initiated on an address outside
the parameters listed in Table 11-2, the EEDATH:EED-
ATL register pair is cleared.
Read Access
User ID, Device ID and
Configuration Word Access
Yes
Yes
Yes
 2010 Microchip Technology Inc.
Write Access
Yes
No
No