PIC12F1822 MICROCHIP [Microchip Technology], PIC12F1822 Datasheet - Page 314

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PIC12F1822

Manufacturer Part Number
PIC12F1822
Description
8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC12F/LF1822/16F/LF1823
REGISTER 26-2:
TABLE 26-3:
DS41413A-page 314
ANSELA
ANSELC
CPSCON0
CPSCON1
INTCON
OPTION_REG
T1CON
TRISA
TRISC
Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by the capacitive sensing module.
Note 1:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
Note 1:
Name
U-0
(1)
2:
(1)
PIC16F/LF1823 only.
These channels are only implemented on the PIC16F/LF1823.
PIC16F/LF1823 only.
TMR1CS1 TMR1CS0
Unimplemented: Read as ‘0’
CPSCH<3:0>: Capacitive Sensing Channel Select bits
If CPSON = 0:
If CPSON = 1:
WPUEN
CPSON
SUMMARY OF REGISTERS ASSOCIATED WITH CAPACITIVE SENSING
Bit 7
GIE
These bits are ignored. No channel is selected.
U-0
0000 = channel 0, (CPS0)
0001 = channel 1, (CPS1)
0010 = channel 2, (CPS2)
0011 = channel 3, (CPS3)
0100 = channel 4, (CPS4)
0101 = channel 5, (CPS5)
0110 = channel 6, (CPS6)
0111 = channel 7, (CPS7)
1000 = Reserved. Do not use.
1111 = Reserved. Do not use.
CPSCON1: CAPACITIVE SENSING CONTROL REGISTER 1
INTEDG
CPSRM
PEIE
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
T1CKPS1
TMR0CS
TMR0IE
TRISA5
TRISC5
Bit 5
(1)
(1)
(1)
(1)
T1CKPS0
U-0
TMR0SE
Preliminary
TRISC4
TRISA4
ANSA4
INTE
Bit 4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
CPSCH3
R/W-0/0
CPSRNG1 CPSRNG0
T1OSCEN
TRISC3
TRISA3
ANSC3
IOCIE
Bit 3
PSA
CPSCH<3:2>
(1)
(1)
CPSCH2
T1SYNC
TMR0IF
TRISA2
TRISC2
ANSA2
ANSC2
Bit 2
PS2
R/W-0/0
(2)
(1)
CPSOUT
CPSCH1
TRISA1
TRISC1
ANSA1
ANSC1
Bit 1
INTF
PS1
 2010 Microchip Technology Inc.
R/W-0/0
TMR1ON
CPSCH0
TRISA0
TRISC0
ANSC0
CPSCH<1:0>
ANSA0
T0XCS
IOCIF
Bit 0
PS0
R/W-0/0
Register
on Page
122
126
313
314
171
180
121
125
89
bit 0

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