PIC12F1822 MICROCHIP [Microchip Technology], PIC12F1822 Datasheet - Page 268

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PIC12F1822

Manufacturer Part Number
PIC12F1822
Description
8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC12F/LF1822/16F/LF1823
24.6.13.1
During a Start condition, a bus collision occurs if:
a)
b)
During a Start condition, both the SDA and the SCL
pins are monitored.
If the SDA pin is already low, or the SCL pin is already
low, then all of the following occur:
• the Start condition is aborted,
• the BCL1IF flag is set and
• the MSSP1 module is reset to its Idle state
The Start condition begins with the SDA and SCL pins
deasserted. When the SDA pin is sampled high, the
Baud Rate Generator is loaded and counts down. If the
SCL pin is sampled low while SDA is high, a bus colli-
sion occurs because it is assumed that another master
is attempting to drive a data ‘1’ during the Start
condition.
FIGURE 24-33:
DS41413A-page 268
(Figure 24-32).
SDA or SCL are sampled low at the beginning of
the Start condition (Figure 24-32).
SCL is sampled low before SDA is asserted low
(Figure 24-33).
SDA
SCL
SEN
BCL1IF
S
SSP1IF
Bus Collision During a Start
Condition
BUS COLLISION DURING START CONDITION (SDA ONLY)
condition if SDA = 1, SCL = 1
Set SEN, enable Start
SDA sampled low before
Start condition. Set BCL1IF.
S bit and SSP1IF set because
SDA = 0, SCL = 1.
SDA goes low before the SEN bit is set.
Set BCL1IF,
S bit and SSP1IF set because
SDA = 0, SCL = 1.
Preliminary
SSP1IF and BCL1IF are
cleared by software
If the SDA pin is sampled low during this count, the
BRG is reset and the SDA line is asserted early
(Figure 24-34). If, however, a ‘1’ is sampled on the SDA
pin, the SDA pin is asserted low at the end of the BRG
count. The Baud Rate Generator is then reloaded and
counts down to zero; if the SCL pin is sampled as ‘0’
during this time, a bus collision does not occur. At the
end of the BRG count, the SCL pin is asserted low.
Note:
SEN cleared automatically because of bus collision.
SSP1 module reset into Idle state.
The reason that bus collision is not a factor
during a Start condition is that no two bus
masters can assert a Start condition at the
exact same time. Therefore, one master
will always assert SDA before the other.
This condition does not cause a bus colli-
sion because the two masters must be
allowed to arbitrate the first address fol-
lowing the Start condition. If the address is
the same, arbitration must be allowed to
continue into the data portion, Repeated
Start or Stop conditions.
SSP1IF and BCL1IF are
cleared by software
 2010 Microchip Technology Inc.

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