NG80960JA-16 INTEL [Intel Corporation], NG80960JA-16 Datasheet - Page 9
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NG80960JA-16
Manufacturer Part Number
NG80960JA-16
Description
EMBEDDED 32-BIT MICROPROCESSOR
Manufacturer
INTEL [Intel Corporation]
Datasheet
1.NG80960JA-16.pdf
(78 pages)
- Current page: 9 of 78
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Figure 2.
2.1
Advance Information Datasheet
80960Jx Block Diagram
80960 Processor Core
The 80960Jx family is a scalar implementation of the 80960 Core Architecture. Intel designed this
processor core as a very high performance device that is also cost-effective. Factors that contribute
to the core’s performance include:
•
•
•
•
•
•
•
•
•
•
CLKIN
Local Register Cache
TAP
SRC1
Core operates at the bus speed with the 80960JA/JF
Core operates at two or three times the bus speed with the 80960JD and 80960JT respectively
Single-clock execution of most instructions
Independent Multiply/Divide Unit
Efficient instruction pipeline minimizes pipeline break latency
Register and resource scoreboarding allow overlapped instruction execution
128-bit register bus speeds local register caching
Two-way set associative, integrated instruction cache
Direct-mapped, integrated data cache
1 Kbyte integrated data RAM delivers zero wait state program data
5
Global / Local
Register File
8-Set
SRC2 DEST
Boundary Scan
PLL, Clocks,
Power Mgmt
128
Controller
3 Independent 32-Bit SRC1, SRC2, and DEST Buses
Multiply
Divide
Unit
Two-Way Set Associative
Instruction Sequencer
Generation
Execution
Address
Instruction Cache
80960JF/JD - 4K
effective
address
Constants
80960JT - 16K
Unit
and
80960JA - 2K
Control
80960JA/JF/JD/JT 3.3 V Microprocessor
32-bit Address
32-bit Data
Interface
Memory
Unit
address / data
32-bit buses
Interrupt Controller
Register Interface
Memory-Mapped
80960JF/JD - 2K
Physical Region
Programmable
Bus Request
Direct Mapped
Configuration
80960JA - 1K
80960JT - 4K
1K Data RAM
Data Cache
Control Unit
Two 32-Bit
Queues
Timers
Bus
Control
Data Bus
Address/
Interrupt
Port
21
32
9
9
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