LAN91C100-FD-SS SMSC [SMSC Corporation], LAN91C100-FD-SS Datasheet - Page 30

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LAN91C100-FD-SS

Manufacturer Part Number
LAN91C100-FD-SS
Description
FEAST Fast Ethernet Controller with Full Duplex Capability
Manufacturer
SMSC [SMSC Corporation]
Datasheet
BANK 2
This register provides access to the read ports of the Receive FIFO and the Transmit completion FIFO. The packet
numbers to be processed by the interrupt service routines are read from this register.
REMPTY - No receive packets queued in the RX FIFO. For polling purposes, uses the RCV_INT bit in the Interrupt Status
Register.
TOP OF RX FIFO PACKET NUMBER - Packet number presently at the output of the RX FIFO. Only valid if REMPTY is
clear. The packet is removed from the RX FIFO using MMU Commands 3) or 4).
TEMPTY - No transmit packets in completion queue. For polling purposes, uses the TX_INT bit in the Interrupt Status
Register.
TX DONE PACKET NUMBER - Packet number presently at the output of the TX Completion FIFO. Only valid if TEMPTY
is clear. The packet is removed when a TX INT acknowledge is issued.
Note: For software compatibility with future versions, the value read from each FIFO register is intended to be written into
the PNR as is, without masking higher bits (provided TEMPTY and REMPTY = 0 respectively).
BANK 2
POINTER REGISTER - The value of this register determines the address to be accessed within the transmit or receive
areas. It will auto-increment on accesses to the data register when AUTO INCR. is set. The increment is by one for every
byte access, by two for every word access, and by four for every double word access. When RCV is set the address refers
to the receive area and uses the output of RX FIFO as the packet number, when RCV is clear the address refers to the
transmit area and uses the packet number at the Packet Number Register.
READ - Determines the type of access to follow. If the READ bit is high the operation intended is a read. If the READ bit is
low the operation is a write. Loading a new pointer value, with the READ bit high, generates a pre-fetch into the Data
Register for read purposes.
SMSC DS – LAN91C100FD REV. B
OFFSET
OFFSET
HIGH
BYTE
BYTE
HIGH
BYTE
BYTE
LOW
LOW
4
6
REMPTY
TEMPTY
RCV
1
1
0
0
FIFO PORTS REGISTER
POINTER REGISTER
AUTO
INCR.
0
0
0
0
0
0
NAME
NAME
READ
0
0
0
0
Page 30
ETEN
POINTER LOW
0
0
0
0
TX DONE PACKET NUMBER
RX FIFO PACKET NUMBER
NOT EMPTY is a read
EMPTY
NOT
READ/WRITE
READ ONLY
0
0
0
0
only bit
TYPE
TYPE
0
0
0
0
POINTER HIGH
0
0
0
0
SYMBOL
SYMBOL
FIFO
PTR
0
0
0
0
Rev. 01-20-06

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