LAN91C100-FD-SS SMSC [SMSC Corporation], LAN91C100-FD-SS Datasheet - Page 35

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LAN91C100-FD-SS

Manufacturer Part Number
LAN91C100-FD-SS
Description
FEAST Fast Ethernet Controller with Full Duplex Capability
Manufacturer
SMSC [SMSC Corporation]
Datasheet
BANK 3
FLTST - Facilitates the inclusion of packet forwarding information on the receive packet memory structure. When 0, RD0-
RD7 is always driven. When 1, RD0-RD7 is floated during RECEIVE FRAME STATUS WORD writes (RA2-RA16=0,
RCVDMA=1, nRWE0-nRWE3=0).
MSK_CRS100 - Disables CRS100 detection during transmit in half duplex mode (SWFDUP=0).
MDO - MII Management output. The value of this bit drives the MDO pin.
MDI - MII Management input. The value of the MDI pin is readable using this bit.
MDCLK - MII Management clock. The value of this bit drives the MDCLK pin.
MDOE - MII Management output enable. When high pin MDO is driven, when low pin MDO is tri-stated.
The purpose of this interface, along with the corresponding pins is to implement MII PHY management in software.
BANK 3
CHIP - Chip ID. Can be used by software drivers to identify the device used.
REV - Revision ID. Incremented for each revision of a given device.
SMSC DS – LAN91C100FD REV. B
HIGH
BYTE
BYTE
HIGH
BYTE
BYTE
HIGH
BYTE
BYTE
OFFSET
LOW
OFFSET
LOW
OFFSET
LOW
A
C
8
DISCRD
FLTST
RCV
0
0
0
1
0
0
MANAGEMENT INTERFACE
EARLY RCV REGISTER
CRS100
REVISION REGISTER
MSK_
0
0
0
0
0
0
0
CHIP
NAME
NAME
NAME
1
1
1
0
0
0
0
nRXDISC PIN COUNTER
Page 35
1
1
1
0
0
1
MDOE
READ/WRITE
0
0
0
0
READ/WRITE
0
1
READ ONLY
ERCV THRESHOLD
TYPE
TYPE
TYPE
MCLK
0
0
0
0
0
1
REV
MDI Pin
MDI
1
1
0
0
1
SYMBOL
SYMBOL
SYMBOL
MGMT
ERCV
REV
MDO
1
0
1
0
0
1
Rev. 01-20-06

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