FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 19

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

PS/2 Model 30 Mode
BIT 0 nDRIVE SELECT 2
The DS2 disk interface is not supported in the
FDC37M81x.
BIT 1 nDRIVE SELECT 3
The DS3 disk interface is not supported in the
FDC37M81x.
BIT 2 WRITE GATE
Active high status of the latched WGATE output
signal. This bit is latched by the active going
edge of WGATE and is cleared by the read of
the DIR register.
BIT 3 READ DATA
Active high status of the latched RDATA output
signal. This bit is latched by the inactive going
edge of RDATA and is cleared by the read of the
DIR register.
RESET
COND.
nDRV2
N/A
7
nDS1
6
1
nDS0
5
1
WDATA
F/F
4
0
19
BIT 4 WRITE DATA
Active high status of the latched WDATA output
signal. This bit is latched by the inactive going
edge of WDATA and is cleared by the read of
the DIR register.
WGATE.
BIT 5 nDRIVE SELECT 0
Active low status of the DS0 disk interface
output.
BIT 6 nDRIVE SELECT 1
Active low status of the DS1 disk interface
output.
BIT 7 nDRV2
Active low status of the DRV2 disk interface
input. Note: This function is not supported in
the FDC37M81x.
RDATA
F/F
3
0
WGATE
F/F
2
0
This bit is not gated with
nDS3
1
1
nDS2
0
1