FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 82

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

The infrared interface provides a two-way
wireless communications port using infrared as
a
implementations have been provided for the
second UART in this chip (logical device 5),
IrDA 1.0, and Amplitude Shift Keyed IR. The IR
transmission can use the standard UART2
TXD2 and RXD2 pins or optional IRTX and
IRRX pins. These can be selected through the
configuration registers.
IrDA 1.0 allows serial communication at baud
rates up to 115.2 kbps.
serially beginning with a zero value start bit. A
zero is signaled by sending a single IR pulse at
the beginning of the serial bit time. A one is
signaled by sending no IR pulse during the bit
time.
parameters of these pulses and the IrDA
waveform.
The
asynchronous serial communication at baud
rates up to 19.2K Baud. Each word is sent
serially beginning with a zero value start bit. A
transmission
Amplitude
Please refer to the AC timing for the
Shift
medium.
Keyed
Each word is sent
Several
IR
INFRARED INTERFACE
allows
IR
82
zero is signaled by sending a 500KHz waveform
for the duration of the serial bit time. A one is
signaled by sending no transmission during the
bit time. Please refer to the AC timing for the
parameters of the ASK-IR waveform.
If the Half Duplex option is chosen, there is a
time-out when the direction of the transmission
is changed. This time-out starts at the last bit
transferred during a transmission and blocks the
receiver input until the timeout expires. If the
transmit buffer is loaded with more data before
the time-out expires, the timer is restarted after
the new byte is transmitted. If data is loaded
into the transmit buffer while a character is
being received, the transmission will not start
until the time-out expires after the last receive
bit has been received. If the start bit of another
character is received during this time-out, the
timer is restarted after the new character is
received. The IR half duplex time-out is
programmable via CRF2 in Logical Device 5.
This
programmed to any value between 0 and
10msec in 100usec increments.
register
allows
the
time-out
to
be