UJA1061TW PHILIPS [NXP Semiconductors], UJA1061TW Datasheet - Page 40

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UJA1061TW

Manufacturer Part Number
UJA1061TW
Description
Low speed CAN/LIN system basis chip
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Notes
1. This flag is cleared automatically upon each overflow event. It has to be set in software each time the interrupt
2. If V2 or V3 is shut down due to a short-circuit, or activation of V2 or V3 fails due to a short-circuit, the interrupt is
2004 Mar 22
Low speed CAN/LIN system basis chip
BIT
behaviour is required (fail-safe behaviour).
forced. V2 can be activated again by clearing CTC (CAN Transmitter Control), setting CAN mode or via a wake-up
event on CAN. V3 can be activated setting bit V3C to a value other than ‘00’.
1
0
SYMBOL
CANIE
LINIE
CAN Interrupt Enable
LIN Interrupt Enable
DESCRIPTION
VALUE
1
0
1
0
40
CAN-bus event results in a wake-up interrupt
CAN-bus event results in a reset
LIN-bus event results in a wake-up interrupt
LIN-bus event results in a reset
FUNCTION
Objective specification
UJA1061

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