XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 11

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

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April 2007 Revised October 2008
MicroStar BGA is a trademark of Texas Instruments.
Other trademarks are the property of their respective owners.
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Full x1 PCI Express Throughput
Fully Compliant with PCI Express to
PCI/PCI-X Bridge Specification,
Revision 1.0
Fully Compliant with PCI Express Base
Specification, Revision 1.0a
Fully Compliant with PCI Local Bus
Specification, Revision 2.3
Extended Virtual Channel (VC) Support
Includes a Second VC for
Quality-of-Service and Isochronous
Applications
PCI Express Advanced Error Reporting
Capability Including ECRC Support
Support for D1, D2, D3
Active State Link Power Management
Saves Power When Packet Activity on the
PCI Express Link is Idle, Using Both L0s
and L1 States
Wake Event and Beacon Support
Error Forwarding Including PCI Express
Data Poisoning and PCI Bus Parity Errors
Utilizes 100-MHz Differential PCI Express
Common Reference Clock or 125-MHz
Single-Ended, Reference Clock
Robust Pipeline Architecture To Minimize
Transaction Latency
Full PCI Local Bus 66-MHz/32-Bit
Throughput
Support for Six Subordinate PCI Bus
Masters with Internal Configurable, 2-Level
Prioritization Scheme
Low Power Design (<350 mW) Ensures
Ease of Implementation
XIO2000AI Supports Industrial
Temperatures at 33-MHz Bus Speeds
XIO2000A Features
Figure 1−1.
Table 1−1.
hot
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cold
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Two Package Options: 15 mm x 15 mm and
12 mm x 12 mm
Internal PCI Arbiter Supporting Up to 6
External PCI Masters
Advanced VC Arbitration Options Include
VC1 Strict Priority, Hardware-Fixed
Round-Robin, and 32-Phase, Weighted
Round-Robin
Advanced PCI Bus Port Arbitration Options
Include 128-phase, Weighted Round-Robin
Time-Based and 128-phase, Weighted
Round-Robin Aggressive Time-Based
Advanced PCI Isochronous Windows for
Memory Space Mapping to a Specified
Traffic Class
Advanced PCI Express Message Signaled
Interrupt Generation for Serial IRQ
Interrupts from CardBus Applications
External PCI Bus Arbiter Option
PCI Bus LOCK Support
Clock Run and Power Override Support
Six Buffered PCI Clock Outputs (33 MHz or
66 MHz)
PCI Bus Interface 3.3-V and 5.0-V (33 MHz
only at 5.0 V) Tolerance Options
Integrated AUX Power Switch Drains V
Power Only When Main Power Is Off
Eight 3.3-V, Multifunction, General-Purpose
I/O Terminals
Memory-Mapped EEPROM Serial-Bus
Controller Supporting PCI Express Power
Budget/Limit Extensions for Add-In Cards
Compact Footprint, 201-Ball, GZZ
MicroStar
Lead-Free 201-Ball, ZZZ MicroStar
175-Ball ZHC MicroStar BGA; or 175-Ball
ZHH MicroStar BGA
TM
BGA (XIO2000A only),
SCPS155C
TM
BGA;
Features
AUX
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