XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 85
XIO2000AI
Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet
1.XIO2000AI.pdf
(159 pages)
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4.53 Link Control Register
April 2007 Revised October 2008
15:8
BIT
1:0
7
6
5
4
3
2
The link control register controls link specific behavior. See Table 4−29 for a complete description of the
register contents.
RESET STATE
BIT NUMBER
FIELD NAME
PCI register offset:
Register type:
Default value:
ASLPMC
RSVD
RSVD
CCC
RCB
ES
RL
LD
ACCESS
15
0
RW
RW
RW
RW
R
R
R
R
14
0
Table 4−29. Link Control Register Description
Reserved. Returns 00h when read.
Extended synch. This bit forces the bridge to extend the transmission of FTS ordered sets and an
extra TS2 when exiting from L1 prior to entering to L0.
Common clock configuration. When this bit is set, it indicates that the bridge and the device at the
opposite end of the link are operating with a common clock source. A value of 0b indicates that the
bridge and the device at the opposite end of the link are operating with separate reference clock
sources. The bridge uses this common clock configuration information to report the L0s and L1 exit
latencies.
Retrain link. This bit has no function and is read-only 0b.
Link disable. This bit has no function and is read-only 0b.
Read completion boundary. This bit is an indication of the RCB of the root complex. The state of
this bit has no affect on the bridge, since the RCB of the bridge is fixed at 128 bytes.
Reserved. Returns 0b when read.
Active state link PM control. This field enables and disables the active state PM.
0 = Normal synch (default)
1 = Extended synch
0 = Reference clock is asynchronous (default)
1 = Reference clock is common
0 = 64 bytes (default)
1 = 128 bytes
00 = Active state PM disabled (default)
01 = L0s entry enabled
10 = L1 entry enabled
11 = L0s and L1 entry enabled
13
0
A0h
Read-only, Read/Write
0000h
12
0
11
0
10
0
9
0
8
0
DESCRIPTION
7
0
6
0
5
0
Classic PCI Configuration Space
4
0
3
0
SCPS155C
2
0
1
0
0
0
75
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