XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 135
XIO2000AI
Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet
1.XIO2000AI.pdf
(159 pages)
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6.17 GPIO Control Register
† These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
April 2007 Revised October 2008
15:8
BIT
7†
6†
5†
4†
3†
2†
1†
0†
This register controls the direction of the eight GPIO terminals. This register has no effect on the behavior of
GPIO terminals that are enabled to perform secondary functions. The secondary functions share GPIO0
(CLKRUN), GPIO1 (PWR_OVRD), GPIO4 (SCL), and GPIO5 (SDA). This register is an alias of the GPIO
control register in the classic PCI configuration space (offset B4h, see Section 4.59). See Table 6−8 for a
complete description of the register contents.
RESET STATE
BIT NUMBER
FIELD NAME
Device control memory window register offset:
Register type:
Default value:
GPIO7_DIR
GPIO6_DIR
GPIO5_DIR
GPIO4_DIR
GPIO3_DIR
GPIO2_DIR
GPIO1_DIR
GPIO0_DIR
RSVD
15
ACCESS
0
RW
RW
RW
RW
RW
RW
RW
RW
R
14
0
Table 6−8. GPIO Control Register Description
Reserved. Returns 00h when read.
GPIO 7 data direction. This bit selects whether GPIO7 is in input or output mode.
GPIO 6 data direction. This bit selects whether GPIO6 is in input or output mode.
GPIO 5 data direction. This bit selects whether GPIO5 is in input or output mode.
GPIO 4 data direction. This bit selects whether GPIO4 is in input or output mode.
GPIO 3 data direction. This bit selects whether GPIO3 is in input or output mode.
GPIO 2 data direction. This bit selects whether GPIO2 is in input or output mode.
GPIO 1 data direction. This bit selects whether GPIO1 is in input or output mode.
GPIO 0 data direction. This bit selects whether GPIO0 is in input or output mode.
13
0
0 = Input (default)
1 = Output
0 = Input (default)
1 = Output
0 = Input (default)
1 = Output
0 = Input (default)
1 = Output
0 = Input (default)
1 = Output
0 = Input (default)
1 = Output
0 = Input (default)
1 = Output
0 = Input (default)
1 = Output
12
0
11
0
10
0
9
0
40h
Read-only, Read/Write
0000h
8
0
DESCRIPTION
Memory-Mapped TI Proprietary Register Space
7
0
6
0
5
0
4
0
3
0
SCPS155C
2
0
1
0
0
0
125
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