HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 555

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
4
3
2
1
Bit Name Initial Value Slave Host Description
ABRT
IBFIE3
IBFIE2
IBFIE1
0
0
0
0
R/(W)* —
R/W
R/W
R/W
R/W
—
—
—
LPC Abort Interrupt Flag
This bit is a flag that generates an ERRI interrupt
when a forced termination (abort) of an LPC transfer
cycle occurs.
0: [Clearing conditions]
1: [Setting condition]
IDR3 and TWR Receive Completion Interrupt
Enable
Enables or disables IBFI3 interrupt to the slave
processor (this LSI).
0: Input data register IDR3 and TWR receive
1: [When TWRIE = 0 in LADR3]
IDR2 Receive Completion Interrupt Enable
Enables or disables IBFI2 interrupt to the slave
processor (this LSI).
0: Input data register (IDR2) receive completed
1: Input data register (IDR2) receive completed
IDR1 Receive Completion Interrupt Enable
Enables or disables IBFI1 interrupt to the slave
processor (this LSI).
0: Input data register (IDR1) receive completed
1: Input data register (IDR1) receive completed
interrupt requests enabled
completed interrupt requests disabled
interrupt requests disabled
interrupt requests enabled
interrupt requests disabled
Writing 0 after reading ABRT = 1
LPC hardware reset and LPC software reset
LPC hardware shutdown and LPC software
shutdown
/)5$0( pin falling edge detection during LPC
transfer cycle
Input data register (IDR3) receive completed
interrupt requests enabled
[When TWRIE = 1 in LADR3]
Input data register (IDR3) and TWR receive
completed interrupt requests enabled
Rev. 2.0, 08/02, page 515 of 788