HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 102

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits designate the time the
CPU and peripheral modules wait for stable clock operation after exiting from standby mode or
watch mode to active mode due to an interrupt. The designation should be made according to the
clock frequency so that the waiting time is at least 10 ms.
Bit 6: STS2
0
1
Note: * Don’t care
Bit 3—Low Speed on Flag (LSON): This bit chooses the system clock (ø) or subclock (ø
the CPU operating clock when watch mode is cleared. The resulting operation mode depends on
the combination of other control bits and interrupt input.
Bit 3: LSON
0
1
Bits 2—Reserved Bits: Bit 2 is reserved: it is always read as 1 and cannot be modified.
Bits 1 and 0—Active (Medium-Speed) Mode Clock Select (MA1, MA0): Bits 1 and 0 choose
ø
(medium-speed) mode. MA1 and MA0 should be written in active (high-speed) mode or subactive
mode.
Bit 1: MA1
0
1
osc
/128, ø
osc
/64, ø
Bit 5: STS1
0
1
*
osc
Description
The CPU operates on the system clock (ø)
The CPU operates on the subclock (ø
/32, or ø
Bit 0: MA0
0
1
0
1
osc
/16 as the operating clock in active (medium-speed) mode and sleep
Bit 4: STS0
0
1
0
1
*
Description
ø
ø
ø
ø
osc
osc
osc
osc
/16
/32
/64
/128
Description
Wait time = 8,192 states
Wait time = 16,384 states
Wait time = 32,768 states
Wait time = 65,536 states
Wait time = 131,072 states
SUB
)
(initial value)
(initial value)
(initial value)
SUB
) as
93