74ACT273MTCX-NL FAIRCHILD [Fairchild Semiconductor], 74ACT273MTCX-NL Datasheet

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74ACT273MTCX-NL

Manufacturer Part Number
74ACT273MTCX-NL
Description
Octal D-Type Flip-Flop
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
© 2005 Fairchild Semiconductor Corporation
74AC273SC
74AC273SJ
74AC273MTC
74AC273PC
74ACT273SC
74ACT273SJ
74ACT273MTC
74ACT273MTCX_NL
(Note 1)
74ACT273PC
74AC273 • 74ACT273
Octal D-Type Flip-Flop
General Description
The AC273 and ACT273 have eight edge-triggered D-type
flip-flops with individual D-type inputs and Q outputs. The
common buffered Clock (CP) and Master Reset (MR) input
load and reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D-
type input, one setup time before the LOW-to-HIGH clock
transition, is transferred to the corresponding flip-flop’s Q
output.
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input. The
device is useful for applications where the true output only
is required and the Clock and Master Reset are common to
all storage elements.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
FACT
Order Number
¥
is a trademark of Fairchild Semiconductor Corporation.
Package
Number
MTC20
MTC20
MTC20
M20D
M20D
M20B
M20B
N20A
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS009954
Features
Ideal buffer for microprocessor or memory
Eight edge-triggered D-type flip-flops
Buffered common clock
Buffered, asynchronous master reset
See 377 for clock enable version
See 373 for transparent latch version
See 374 for 3-STATE version
Outputs source/sink 24 mA
74ACT273 has TTL-compatible inputs
Package Description
November 1988
Revised March 2005
www.fairchildsemi.com

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74ACT273MTCX-NL Summary of contents

Page 1

... M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT273MTCX_NL MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm (Note 1) Wide 74ACT273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" ...

Page 2

Connection Diagram Logic Symbols IEEE/IEC Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com Pin Descriptions Pin Names Description D –D Data Inputs ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current (I ...

Page 4

AC Electrical Characteristics for AC Symbol Parameter f Maximum Clock MAX Frequency t Propagation Delay PLH Clock to Output t Propagation Delay PHL Clock to Output t Propagation Delay PHL MR to Output r Note 6: Voltage Range 3.3 is ...

Page 5

DC Electrical Characteristics for ACT V Symbol Parameter V Minimum HIGH Level 4.5 IH Input Voltage 5.5 V Maximum LOW Level 4.5 IL Input Voltage 5.5 V Minimum HIGH Level 4.5 OH Output Voltage 5.5 4.5 5.5 V Maximum LOW ...

Page 6

AC Operating Requirements for ACT Symbol Parameter t Setup Time, HIGH or LOW Hold Time, HIGH or LOW Clock Pulse Width W HIGH or LOW t MR Pulse ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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