HYB18T512800B2F QIMONDA [Qimonda AG], HYB18T512800B2F Datasheet - Page 27

no-image

HYB18T512800B2F

Manufacturer Part Number
HYB18T512800B2F
Description
200-Pin SO-DIMM DDR2 SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) ODT turn on time min is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when the
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Rev. 1.1, 2007-01
08212006-PKYN-2H1B
Symbol
t
t
t
t
t
t
t
t
AOND
AON
AONPD
AOFD
AOF
AOFPD
ANPD
AXPD
ODT resistance is fully on. Both are measured from
(= 2 x 5 ns) after the clock edge that registered a first ODT HIGH if
Both are measured from
12.5 ns (= 2.5 x 5 ns) after the clock edge that registered a first ODT HIGH if
Parameter / Condition
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down Modes)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down Modes)
ODT to Power Down Mode Entry Latency
ODT Power Down Exit Latency
t
AOFD
. Both are measured from
ODT AC Character. and Operating Conditions for DDR2-533 & DDR2-400
t
AOND
t
, which is interpreted differently per speed bin. For DDR2-400/533,
AOFD
, which is interpreted differently per speed bin. For DDR2-400/533,
Values
Min.
2
t
t
2.5
t
t
3
8
AC.MIN
AC.MIN
AC.MIN
AC.MIN
27
t
CK
= 5 ns.
+ 2 ns
+ 2 ns
t
CK
HYS64T[32/64/128]xxxEDL–[25F/…/3.7](–)B2
= 5 ns.
Max.
2
t
2
t
2.5
2.5
AC.MAX
AC.MAX
t
CK +
Small Outlined DDR2 SDRAM Modules
t
CK +
t
+ 1 ns
AC.MAX
+ 0.6 ns
t
AC.MAX
+ 1 ns
+ 1 ns
Internet Data Sheet
Unit
t
ns
ns
t
ns
ns
t
t
CK
CK
CK
CK
TABLE 19
t
AOND
Note
1)
2)
t
is 10 ns
AOFD
is

Related parts for HYB18T512800B2F