FSSD07BQX_12 FAIRCHILD [Fairchild Semiconductor], FSSD07BQX_12 Datasheet - Page 2

• Manufacturer Part Number: FSSD07BQX_12
• Description: 1-Bit / 4-Bit SD/SDIO and MMC Dual-Host Multiplexer
• Manufacturer: FAIRCHILD [Fairchild Semiconductor]

© 2007 Fairchild Semiconductor Corporation
FSSD07 Rev. 1.0.2
Pin Configuration
Pin Definitions
Truth Table
Pin# MLP
HIGH
HIGH
LOW
OE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
HIGH
LOW
Figure 2.
S
X
DAT[2]
DAT[3]
DAT[0]
DAT[1]
VDDC
CMD
GND
Pin# UMLP
CLK
Function
1CMD, 1CLK, 1DAT[3:0] connected to CMD, CLK, DAT[3:0]
2CMD, 2CLK,2DAT[3:0] connected to CMD, CLK, DAT[3:0]
CMD, DAT[3:0] ports high impedance; CLK is function of selected nCLK
10
3
5
6
7
8
9
22
23
24
10
11
12
13
14
15
16
17
18
19
20
21
4
1
2
3
4
5
6
7
8
9
2
11
1
12
MLP Pin Assignments
24
13 14
23
21
18
16
15
22
20
19
17
1CLK
1DAT[0]
1DAT[1]
2DAT[2]
2DAT[3]
2CMD
VDDH1
VDDH2
1DAT[2]
2DAT[1]
2DAT[0]
2DAT[3]
2DAT[2]
1DAT[1]
1DAT[0]
1DAT[3]
VDDH2
VDDH1
Name
DAT[2]
DAT[3]
DAT[0]
DAT[1]
VDDC
2CMD
1CMD
2CLK
1CLK
CMD
GND
CLK
OE
S
2
SDIO Common Port
Output Enable (Active HIGH)
SDIO Common Port
Power Supply (SDIO Peripheral Card Port)
Ground
Clock Path Port
SDIO Common Port
Select Pin
Host Common Port
Clock Path Port
Power Supply (Host Port)
Host Common Port
Clock Path Port
Power Supply (SDIO Host Port)
Host Common Port
Figure 3.
DAT[3]
DAT[0]
VDDC
CMD
GND
CLK
1
2
3
4
5
6
24
7
23
8
UMLP Pin Assignments
Description
22
9
10
21
11
20
12
19
18
17
16
15
14
13
1CLK
1DAT[0]
1DAT[1]
2DAT[2]
2DAT[3]
2CMD
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