ATXMEGA128B3-AU ATMEL [ATMEL Corporation], ATXMEGA128B3-AU Datasheet - Page 28
ATXMEGA128B3-AU
Manufacturer Part Number
ATXMEGA128B3-AU
Description
8/16-bit Atmel XMEGA B3 Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATXMEGA128B3-AU.pdf
(137 pages)
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13. WDT – Watchdog Timer
13.1
13.2
8074B–AVR–02/12
Features
Overview
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The watchdog timer (WDT) is a system function for monitoring correct program operation. It
makes it possible to recover from error situations such as runaway or deadlocked code. The
WDT is a timer, configured to a predefined timeout period, and is constantly running when
enabled. If the WDT is not reset within the timeout period, it will issue a microcontroller reset.
The WDT is reset by executing the WDR (watchdog timer reset) instruction from the application
code.
The window mode makes it possible to define a time slot or window inside the total timeout
period during which WDT must be reset. If the WDT is reset outside this window, either too early
or too late, a system reset will be issued. Compared to the normal mode, this can also catch sit-
uations where a code error causes constant WDR execution.
The WDT will run in active mode and all sleep modes, if enabled. It is asynchronous, runs from a
CPU-independent clock source, and will continue to operate to issue a system reset even if the
main clocks fail.
The configuration change protection mechanism ensures that the WDT settings cannot be
changed by accident. For increased safety, a fuse for locking the WDT settings is also available.
Issues a device reset if the timer is not reset before its timeout period
Asynchronous operation from dedicated oscillator
1kHz output of the 32kHz ultra low power oscillator
11 selectable timeout periods, from 8ms to 8s
Two operation modes:
Configuration lock to prevent unwanted changes
– Normal mode
– Window mode
XMEGA B3
28
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