AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 520
AT32UC3L064-D3HES
Manufacturer Part Number
AT32UC3L064-D3HES
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3L064-D3HES.pdf
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• SWRST: Software Reset
• STREN: Clock Stretch Enable
• GCMATCH: General Call Address Match
• SMATCH: Slave Address Match
• SMEN: SMBus Mode Enable
• SEN: Slave Enable
32099D–06/2010
This bit will always read as 0.
Writing a zero to this bit has no effect.
Writing a one to this bit resets the TWIS.
Writing this bit to zero disables clock stretching if RHR/THR buffer full/empty. May cause over/underrun.
Writing this bit to one enables clock stretching if RHR/THR buffer full/empty.
Writing this bit to zero causes TWIS not to acknowledge the General Call Address.
Writing this bit to one causes TWIS to acknowledge the General Call Address.
Writing this bit to zero causes TWIS not to acknowledge the Slave Address.
Writing this bit to one causes TWIS to acknowledge the Slave Address.
Writing this bit to zero disables SMBus mode.
Writing this bit to one enables SMBus mode.
Writing this bit to zero disables the slave interface.
Writing this bit to one enables the slave interface.
AT32UC3L016/32/64
520
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