AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 537
AT32UC3L064-D3HES
Manufacturer Part Number
AT32UC3L064-D3HES
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3L064-D3HES.pdf
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24.3
24.4
24.5
32099D–06/2010
Block Diagram
I/O Lines Description
Product Dependencies
Figure 24-1. PWMA Block Diagram
Each channel outputs one PWM waveform on one external I/O line.
Table 24-1.
In order to use this module, other parts of the system must be configured correctly, as described
below.
Pin Name
PWMA[n]
PWMMOD[n]
CLK_PWMA
GCLK
PB Clock Domain
TOP
GCLK Domain
I/O Line Description
Timebase
TCLR
Control
Counter
Pin Description
Output PWM waveform for one channel n
Output PWM waveform for one channel n, open drain mode
Spectrum
SPREAD
Counter
Spread
Duty Cycle
ETV
COMP
Duty Cycle
Register
PB
Channel 0
Sync
PWMA[m:0]
Channel
Select
Channel 1
PWM Blocks
AT32UC3L016/32/64
Channel m
BUSY
TOFL
Handling
Interrupt
IRQ
Type
Output
Output
Adjust
Channel_0
537
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