P89LPC915FDH NXP [NXP Semiconductors], P89LPC915FDH Datasheet - Page 42

• Manufacturer Part Number: P89LPC915FDH
• Description: 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V flash with 8-bit A/D converter
• Manufacturer: NXP [NXP Semiconductors]

Philips Semiconductors
9397 750 14397
Product data
9.16.1 Mode 0
9.16.2 Mode 1
9.16.3 Mode 2
9.16 Timers/counters 0 and 1
Reset can be triggered from the following sources:
For every reset source, there is a flag in the Reset Register, RSTSRC. The user can
read this register to determine the most recent reset source. These flag bits can be
cleared in software by writing a logic 0 to the corresponding bit. More than one flag bit
may be set:
The P89LPC915/916/917 devices have two general purpose counter/timers which
are upward compatible with the standard 80C51 Timer 0 and Timer 1. An option to
automatically toggle the T0 pin upon timer overflow has been added. In addition an
option to toggle the T1 pin upon overflow has been added on the P89LPC917. In the
‘Timer’ function, the register is incremented every machine cycle. In the ‘Counter’
function, the register of Timer 0 is incremented in response to a 1-to-0 transition at its
external input pin. This external input is sampled once very machine cycle.
Timer 0 has five operating modes (modes 0, 1, 2, 3, and 6).
Timer 1 has four operating modes (modes 0, 1, 2, and 3), except on the P89LPC917
where Timer 1 also has mode 6. Modes 0, 1, and 2 are the same for both
Timers/Counters. Mode 3 is different.
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit
Counter with a divide-by-32 prescaler. In this mode, the Timer register is configured
as a 13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1.
Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used.
Mode 2 configures the Timer register as an 8-bit Counter with automatic reload.
Mode 2 operation is the same for Timer 0 and Timer 1.
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External reset pin (during power-up or if user configured via UCFG1. This option
must be used for an oscillator frequency above 12 MHz.)
Power-on detect
Brownout detect
Watchdog Timer
Software reset
UART break character detect reset.
During a power-on reset, both POF and BOF are set but the other flag bits are
cleared.
For any other reset, previously set flag bits that have not been cleared will remain
set.
Rev. 04 — 17 December 2004
8-bit microcontrollers with accelerated two-clock 80C51 core
P89LPC915/916/917
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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