P89LPC915FDH NXP [NXP Semiconductors], P89LPC915FDH Datasheet - Page 46

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P89LPC915FDH

Manufacturer Part Number
P89LPC915FDH
Description
8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V flash with 8-bit A/D converter
Manufacturer
NXP [NXP Semiconductors]
Datasheets

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Philips Semiconductors
9397 750 14397
Product data
9.19 I
I
connected to the bus, and it has the following features:
A typical I
device provides a byte-oriented I
400 kHz.
2
2
Fig 14. I
C-bus uses two wires (SDA and SCL) to transfer information between devices
C-bus serial interface
Bi-directional data transfer between masters and slaves
Multi master bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of
serial data on the bus
Serial clock synchronization allows devices with different bit rates to communicate
via one serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend
and resume serial transfer
The I
2
C-bus may be used for test and diagnostic purposes.
2
2
C-bus configuration.
C-bus configuration is shown in
I
2
C-BUS
Rev. 04 — 17 December 2004
P1.3/SDA
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
P1.2/SCL
2
C-bus interface that supports data transfers up to
OTHER DEVICE
WITH I
R
INTERFACE
P
P89LPC915/916/917
Figure
2
C-BUS
R
P
14. The P89LPC915/916/917
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
OTHER DEVICE
WITH I
INTERFACE
2
C-BUS
002aaa834
SDA
SCL
46 of 72

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