STR910FM32X6T STMICROELECTRONICS [STMicroelectronics], STR910FM32X6T Datasheet - Page 17

• Manufacturer Part Number: STR910FM32X6T
• Description: ARM966E-S 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC Motor Control, 4 Timers, ADC, RTC, DMA
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STR91xF
2.11.1 Run mode
2.11.2 Idle mode
Note:
2.11.3 Sleep mode
2.12
The STR91xF supports the following three global power control modes:
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A special mode is used when JTAG debug is active which never gates off any clocks even if the
CPU enters Idle or Sleep mode.
This is the default mode after any reset occurs. Firmware can gate off or scale any individual
clock. Also available is a special Interrupt Mode which allows the CPU to automatically run full
speed during an interrupt service and return back to the selected CPU clock divisor rate when
the interrupt has been serviced. The advantage here is that the CPU can run at a very low
frequency to conserve power until a periodic wake-up event or an asynchronous interrupt
occurs at which time the CPU runs full speed immediately.
In this mode the CPU suspends code execution and the CPU and FMI clocks are turned off
immediately after firmware sets the Idle Bit. Various peripherals continue to run based on the
settings of the mask registers that exist just prior to entering Idle Mode. There are 3 ways to exit
Idle Mode and return to Run Mode:
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It is possible to remain in Idle Mode for the majority of the time and the RTC can be
programmed to periodically wake up to perform a brief task or check status.
In this mode all clock circuits except the RTC are turned off and main oscillator input pins
X1_CPU and X2_CPU are disabled. The entire chip is quiescent (except for RTC and wake-up
circuitry). There are three means to exit Sleep Mode and re-start the system:
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Voltage supplies
The STR91xF requires two separate operating voltage supplies. The CPU and memories
operate from a 1.65V to 2.0V on the VDD pins, and the I/O ring operates at 2.7V to 3.6V on the
VDDQ pins.
Run Mode: All clocks are on with option to gate individual clocks off via clock mask
registers.
Idle Mode: CPU and FMI clocks are off until an interrupt, reset, or wake-up occurs. Pre-
configured clock mask registers selectively allow individual peripheral clocks to continue
run during Idle Mode.
Sleep Mode: All clocks off except optional RTC clock. Wake up unit remains powered,
PLL is forced off.
Any reset (external reset pin, watchdog, low-voltage, power-up, JTAG debug command)
Any interrupt (external, internal peripheral, RTC alarm or interval)
Input from wake-up unit on GPIO pins (optionally does not cause interrupt)
Some resets (external reset pin, low-voltage, power-up, JTAG debug command)
RTC alarm
Input from wake-up unit
Functional overview
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