STR910FM32X6T STMICROELECTRONICS [STMicroelectronics], STR910FM32X6T Datasheet - Page 36

• Manufacturer Part Number: STR910FM32X6T
• Description: ARM966E-S 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC Motor Control, 4 Timers, ADC, RTC, DMA
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Pin description
4.1
Notes: 1 STMicroelectronics advises to ground all unused pins on port 0 - 9 to reduce noise
Table 2.
36/72
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-
-
-
-
Pkg
67
69
71
76
78
2 All pins on ports 0 - 9 are 5V tolerant
3 Pins on ports 0,1,2,4,5,7,8,9 have 4 mA drive and 4mA sink. Ports 3 and 6 have 8 mA drive and
4 For 8-bit non-muxed EMI operation: Port 8 is eight bits of data, ports 7 and 9 are 16 bits of
5 For 16-bit muxed EMI operation: Ports 8 and 9 are 16 bits of muxed address and data bits, port
6 Signal polarity is programmable for interrupt request inputs, EMI_ALE, timer input capture
7 HiZ = High Impedance, V = Voltage Source, G = Ground, I/O = Input/Output
8 STR910F devices do not support USB. On these devices USBDP and USBDN signals are "Not
9 STR910F 128-pin devices do not support Ethernet. On these devices PHYCLK and all
Pin Name
Default pin functions
During and just after reset, all pins on ports 0-9 default to high-impedance input mode until
CPU firmware assigns other functions to the pins. This initial input mode routes all pins on ports
0-9 to be read as GPIO inputs as shown in the “Default Pin Function” column of
Simultaneously, certain port pin signals are also routed to other functional inputs as shown in
the “Default Input Function” column of
CPU firmware makes other assignments. At any time, even after the CPU assigns pins to
alternate functions, the CPU may always read the state of any pin on ports 0-9 as a GPIO input.
CPU firmware may assign alternate functions to port pins as shown in columns “Alternate Input
1” or “Alternate Output 1, 2, 3” of
Notes for
susceptibility, noise generation, and minimize power consumption. There are no internal or
programmable pull-up resistors on ports 0-9.
8 mA sink.
address.
7 is up to eight additional bits of high-order address
inputs and output compare/PWM outputs, motor control tach and emergency stop inputs, and
motor control phase outputs.
Used" (USBDN is not connected, USBDP must be pulled up by a 1.5K ohm resistor to VDDQ),
and all functions named “USB" are not available.
functions named “MII*" are not available.
P0.0
P0.1
P0.2
P0.3
P0.4
Device pin description
I/O
I/O
I/O
I/O
I/O
Table
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
Default Pin
Function
GPIO_0.0,
GPIO_0.1,
GPIO_0.2,
GPIO_0.3,
GPIO_0.4,
2:
Default Input
PHY Xmit clock
PHY Rx data0
MII_TX_CLK,
PHY Rx data
PHY Rx data
MII_RXD0,
MII_RXD1,
MII_RXD2,
Function
-
Table 2
Table
TIM0_ICAP1,
Input Capture
I2C0_CLKIN,
I2C1_CLKIN,
by writing to control registers at run-time.
I2C clock in
I2C clock in
Alternate
I2C data in
I2C data in
I2C0_DIN,
I2C1_DIN,
Input 1
2, and these pin input functions will remain until
Alternate
GPIO_0.0,
GP Output
GPIO_0.1,
GP Output
GPIO_0.2,
GP Output
GPIO_0.3,
GP Output
GPIO_0.4,
GP Output
Output 1
Alternate functions
EMI Chip Select
I2C0_CLKOUT,
I2C1_CLKOUT,
I2C clock out
I2C clock out
I2C0_DOUT,
I2C1_DOUT,
I2C data out
I2C data out
EMI_CS0n,
Alternate
Output 2
Table
ETM pipe status
ETM_PSTAT0,
ETM_PCK0,
ETM_PCK1,
ETM_PCK2,
ETM_PCK3,
STR91xF
ETM Packet
ETM Packet
ETM Packet
ETM Packet
Alternate
Output 3
2.