LM3S101-CRN20-XNPP ETC1 [List of Unclassifed Manufacturers], LM3S101-CRN20-XNPP Datasheet - Page 187
![no-image](/images/no-image-200.jpg)
LM3S101-CRN20-XNPP
Manufacturer Part Number
LM3S101-CRN20-XNPP
Description
Microcontroller
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S101-CRN20-XNPP.pdf
(284 pages)
- Current page: 187 of 284
- Download datasheet (3Mb)
Universal Asynchronous Receiver/Transmitter (UART)
11.4
Table 11-1.
187
0xFDC
0xFEC
Offset
0x02C
0x03C
0xFD0
0xFD4
0xFD8
0xFE0
0xFE4
0xFE8
0xFFC
0xFF0
0xFF4
0xFF8
0x000
0x004
0x018
0x024
0x028
0x030
0x034
0x038
0x040
0x044
UARTRSR
UARTPeriphID4
UARTPeriphID5
UARTPeriphID6
Name
UARTDR
UARTECR
UARTFR
UARTIBRD
UARTFBRD
UARTLCRH
UARTCTL
UARTIFLS
UARTIM
UARTRIS
UARTMIS
UARTICR
UARTPeriphID7
UARTPeriphID0
UARTPeriphID1
UARTPeriphID2
UARTPeriphID3
UARTPCellID0
UARTPCellID1
UARTPCellID2
UARTPCellID3
Register Map
Table 11-1 lists the UART registers. All addresses given are relative to the UART’s base address:
Note:
UART0: 0x4000C000
UART Register Map
The UART must be disabled (see the UARTEN bit in the UARTCTL register on page 199)
before any of the control registers are reprogrammed. When the UART is disabled during
a TX or RX operation, the current transaction is completed prior to the UART stopping.
0x0000000D
0x000000B1
0x00000000
0x00000000
0x00000090
0x00000000
0x00000000
0x00000000
0x00000300
0x00000012
0x00000000
0x0000000F
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000018
0x00000001
0x000000F0
0x00000005
0x00000011
Reset
Type
W1C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Preliminary
Description
Data
Receive Status (read)
Error Clear (write)
Flag Register (read only)
Integer Baud-Rate Divisor
Fractional Baud-Rate Divisor
Line Control Register, High byte
Control Register
Interrupt FIFO Level Select
Interrupt Mask
Raw Interrupt Status
Masked Interrupt Status
Interrupt Clear
Peripheral identification 4
Peripheral identification 5
Peripheral identification 6
Peripheral identification 7
Peripheral identification 0
Peripheral identification 1
Peripheral identification 2
Peripheral identification 3
PrimeCell identification 0
PrimeCell identification 1
PrimeCell identification 2
PrimeCell identification 3
March 22, 2006
See
page
189
191
193
195
196
197
199
200
201
203
204
205
206
207
208
209
210
211
212
213
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217
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