LM3S328-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S328-IQC20-A0 Datasheet - Page 10

• Manufacturer Part Number: LM3S328-IQC20-A0
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

List of Registers
List of Registers
ARM Cortex-M3 Processor Core ................................................................................................... 31
Register 1:
Register 2:
Register 3:
System Control ............................................................................................................................... 54
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Internal Memory .............................................................................................................................. 95
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
10
SysTick Control and Status Register......................................................................................... 36
SysTick Reload Value Register ................................................................................................. 37
SysTick Current Value Register ................................................................................................ 38
Device Identification 0 (DID0), offset 0x000 .............................................................................. 62
Device Identification 1 (DID1), offset 0x004 .............................................................................. 63
Device Capabilities 0 (DC0), offset 0x008................................................................................. 65
Device Capabilities 1 (DC1), offset 0x010................................................................................. 66
Device Capabilities 2 (DC2), offset 0x014................................................................................. 68
Device Capabilities 3 (DC3), offset 0x018................................................................................. 69
Device Capabilities 4 (DC4), offset 0x01C ................................................................................ 71
Power-On and Brown-Out Reset Control (PBORCTL), offset 0x030 ........................................ 72
LDO Power Control (LDOPCTL), offset 0x034.......................................................................... 73
Software Reset Control 0 (SRCR0), offset 0x040 ..................................................................... 74
Software Reset Control 1 (SRCR1), offset 0x044 ..................................................................... 75
Software Reset Control 2 (SRCR2), offset 0x048 ..................................................................... 76
Raw Interrupt Status (RIS), offset 0x050................................................................................... 77
Interrupt Mask Control (IMC), offset 0x054 ............................................................................... 78
Masked Interrupt Status and Clear (MISC), offset 0x058.......................................................... 80
Reset Cause (RESC), offset 0x05C .......................................................................................... 81
Run-Mode Clock Configuration (RCC), offset 0x060................................................................. 82
XTAL to PLL Translation (PLLCFG), offset 0x064 .................................................................... 86
Run-Mode Clock Gating Control 0 (RCGC0), offset 0x100 ....................................................... 87
Sleep-Mode Clock Gating Control 0 (SCGC0), offset 0x110..................................................... 87
Deep-Sleep-Mode Clock Gating Control 0 (DCGC0), offset 0x120........................................... 87
Run-Mode Clock Gating Control 1 (RCGC1), offset 0x104 ....................................................... 89
Sleep-Mode Clock Gating Control 1 (SCGC1), offset 0x114..................................................... 89
Deep-Sleep-Mode Clock Gating Control 1 (DCGC1), offset 0x124........................................... 89
Run-Mode Clock Gating Control 2 (RCGC2), offset 0x108 ....................................................... 91
Sleep-Mode Clock Gating Control 2 (SCGC2), offset 0x118..................................................... 91
Deep-Sleep-Mode Clock Gating Control 2 (DCGC2), offset 0x128........................................... 91
Deep-Sleep Clock Configuration (DSLPCLKCFG), offset 0x144 .............................................. 92
Clock Verification Clear (CLKVCLR), offset 0x150.................................................................... 93
Allow Unregulated LDO to Reset the Part (LDOARST), offset 0x160 ....................................... 94
Flash Memory Protection Read Enable (FMPRE), offset 0x130 ............................................. 101
Flash Memory Protection Program Enable (FMPPE), offset 0x134 ........................................ 102
USec Reload (USECRL), offset 0x140.................................................................................... 103
Flash Memory Address (FMA), offset 0x000 ........................................................................... 104
Flash Memory Data (FMD), offset 0x004 ................................................................................ 106
Flash Memory Control (FMC), offset 0x008 ............................................................................ 107
Flash Controller Raw Interrupt Status (FCRIS), offset 0x00C ................................................. 109
Flash Controller Interrupt Mask (FCIM), offset 0x010 ............................................................. 110
Flash Controller Masked Interrupt Status and Clear (FCMISC), offset 0x014......................... 111
Preliminary
April 27, 2007