LM3S328-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S328-IQC20-A0 Datasheet - Page 113

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LM3S328-IQC20-A0

Manufacturer Part Number
LM3S328-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
8.1
Figure 8-1. GPIO Module Block Diagram
8.2
April 27, 2007
PA0
PA1
PA2
PA3
PA4
PA5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
Block Diagram
Functional Description
Important:
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure 8-2).
The LM3S328 microcontroller contains five ports and thus five of these physical GPIO blocks.
U0Rx
U0Tx
SSIClk
SSIFss
CCP0
CCP2
I2CSCL
I2CSDA
SSIRx
SSITx
All GPIO pins are inputs by default (GPIODIR=0 and GPIOAFSEL=0), with the
exception of the five JTAG pins (PB7 and PC[3:0]. The JTAG pins default to their
JTAG functionality (GPIOAFSEL=1). Asserting a Power-On-Reset (POR) or an
external reset (RST) puts both groups of pins back to their default state.
Timer1
Timer0
UART0
SSI
I
2
C
CCP1
CCP3
Preliminary
TRST
CCP5
JTAG
UART1
Timer2
TCK/SWCLK
TMS/SWDIO
TDO/SWO
CCP4
U1Rx
U1Tx
TDI
LM3S328 Data Sheet
PE0
PE1
PD0
PD1
PD2
PD3
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
113

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