LM3S328-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S328-IQC20-A0 Datasheet - Page 126

• Manufacturer Part Number: LM3S328-IQC20-A0
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

General-Purpose Input/Outputs (GPIOs)
126
Reset
Type
Reset
Type
Bit/Field
31:8
GPIO Raw Interrupt Status (GPIORIS)
Offset 0x414
7:0
RO
RO
31
15
0
0
Register 7: GPIO Raw Interrupt Status (GPIORIS), offset 0x414
The GPIORIS register is the raw interrupt status register. Bits read High in GPIORIS reflect the
status of interrupt trigger conditions detected (raw, prior to masking), indicating that all the
requirements have been met, before they are finally allowed to trigger by the GPIO Interrupt
Mask (GPIOIM) register (see page 125). Bits read as zero indicate that corresponding input pins
have not initiated an interrupt. All bits are cleared by a reset.
RO
RO
30
14
0
0
reserved
Name
RIS
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x00
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPIO Interrupt Raw Status
Reflect the status of interrupt trigger condition detection on pins
(raw, prior to masking).
0: Corresponding pin interrupt requirements not met.
1: Corresponding pin interrupt has met requirements.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RIS
RO
RO
19
0
3
0
RO
RO
18
0
2
0
April 27, 2007
RO
RO
17
0
1
0
RO
RO
16
0
0
0