Z86D99 ZILOG [Zilog, Inc.], Z86D99 Datasheet - Page 27

• Manufacturer Part Number: Z86D99
• Description: Low-Voltage Micro controllers with ADC
• Manufacturer: ZILOG [Zilog, Inc.]

PS003807-1002
Register Function
Register Pointer
Stack Pointer
Program Control Flags
Low Battery Detect
ADC Control
ADC Data
Interrupt Mask
Interrupt Priority
Interrupt Request
Port Configuration (A)
Port Configuration (B)
Port 2 Data
Port 2 Mode
Port 4 Data
Port 4 Mode
Port 5 Data
Port 5 Mode
Port 6 Data
Port 6 Mode
T1 Timer Data
T1 Timer Mode
T1 Timer Prescale
T8/T16 Control (A)
T8/T16 Control (B)
T8 Timer Control
T8 High Capture
T8 Low Capture
T8 High Load
T8 Low Load
T16 Timer Control
T16 High Capture
T16 Low Capture
T16 High Load
T16 Low Load
Table 5. Control and Status Register Reset Conditions
Address
Grp/Bnk Register
F0h
F0h
F0h
0Dh
0Fh
00h
F0h
F0h
F0h
0Fh
F0h
00h
F0h
00h
0Fh
00h
0Fh
00h
0Fh
F0h
F0h
F0h
0Dh
0Dh
0Dh
0Dh
0Dh
0Dh
0Dh
0Dh
0Dh
0Dh
0Dh
0Dh
P
r13 (R253) RP
r15 (R255) SP
r12 (R252) Flags
r12
r8
r7 (R7)
r11 (R251) IMR
r9 (R249) IPR
r10 (R250) IRQ
r0
r7 (R247) P3M
r2 (R2)
r6 (R246) P2M
r4 (R4)
r2
r5 (R5)
r4
r6 (R6)
r6
r2 (R242) T1
r1 (R241) TMR
r3 (R243) PRE1
r1
r3
r0
r11
r10
r5
r4
r2
r9
r8
r7
r6
R
E
L
Symbol
LB
ADCCTRL
ADCDATA
P456CON
P2
P4
P4M
P5
P5M
P6
P6M
CTR1
CTR3
CTR0
HI8
LO8
TC8H
TC8L
CTR2
HI16
LO16
TC16H
TC16L
I
†
†
†
M
†
†
†
†
Z86D990/Z86D991 OTP and Z86L99X ROM
†
I
Low-Voltage Microcontrollers with ADC
N
R/W 7
R/W 0
R/W X
R/W X
R/W 1
R/W 0
R
R/W 0
W
R/W 0
R/W 0
W
R/W X
W
R/W X
R/W 1
R/W X
R/W 1
R/W X
R/W 1
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
RW
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
A
R
Reset Value
0
0
1
1
0
Y
6
0
X
X
1
0
0
0
0
0
0
1
X
1
X
1
X
1
X
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5
0
X
X
1
0
0
0
0
0
0
1
X
1
X
1
X
1
X
1
0
0
0
0*
0*
0*
0
0
0
0
0
0
0
0
0
4
0
X
X
1
0
0
0
0
0
0
1
X
1
X
1
X
1
X
1
0
0
0
0*
X
0*
0
0
0
0
0
0
0
0
0
3
0
X
X
1
0
0
0
0
0
0
1
X
1
X
1** 1
X
1
X
1
0
0
0
0
X
0*
0
0
0
0
0
0
0
0
0
2
0
X
X
X
0
0
0
0
0
1
1
X
1
X
X
1
X
1
0
0
0
0
X
0*
0
0
0
0
0
0
0
0
0
1
0
X
X
0
0
0
0
0
0
1
1
X
1
X
1
X
1
X
1
0
1
0
0
X
0*
0
0
0
0
0
0
0
0
0
0
0
X
X
0
0
0
0
0
0
1
1
X
1
X
1
X
1
X
1
0
1
0
0
X
0
0
0
0
0
0
0
0
0
0
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