Z86D99 ZILOG [Zilog, Inc.], Z86D99 Datasheet - Page 64

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Z86D99

Manufacturer Part Number
Z86D99
Description
Low-Voltage Micro controllers with ADC
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z86D990FZ008SC
Manufacturer:
Zilog
Quantity:
10 000
PS003807-1002
Bit
Bit/Field
R/W
Reset
R = Read, W = Write, X = Indeterminate
Bit
Position
7_______
_6______
__5_____
___4____
Program Control Flag Register (Flags)
The Program Control Flag register (see Table 15) reflects the current status of the
Z8 as shown in Table 15. The FLAGS register contains six bits of status informa-
tion that are set or cleared by CPU operations. Four of the bits (C, V, Z, and S) can
be tested for use with conditional jump instructions. Two flags (H and D) cannot be
tested and are used for BCD arithmetic. The two remaining flags in the register
(F1 and F2) are available to the user, but they must be set or cleared by instruc-
tions and are not usable with conditional jumps.
Table 15. FLAGS Register [Group/Bank F0h, Register C (R252)]
7
C
R/W
X
Bit/Field
Carry Flag (C)
Zero Flag (Z)
Sign Flag (S)
Overflow
Flag (V)
P
6
Z
R/W
X
R
E
L
5
S
R/W
X
R/W
R/W
R/W
R/W
R/W
I
M
Z86D990/Z86D991 OTP and Z86L99X ROM
4
V
R/W
X
Value
1
1
X
1
I
Low-Voltage Microcontrollers with ADC
N
A
3
D
R/W
X
Description
Indicates the “carry out” of bit 7
position of a register being used as
an accumulator; on Rotate and Shift
instructions this bit contains the most
recent value shifted out of the
specified register
Indicates that the contents of an
accumulator register is zero following
an arithmetic or logical operation
Stores the value of the most
significant bit of a result following an
arithmetic, logical, Rotate, or Shift
operation; in arithmetic operations on
signed numbers, a positive number is
identified by a 0, and a negative
number is identified by a 1
For signed arithmetic, Rotate, and
Shift operations, the flag is set to 1
when the result is greater than the
maximum possible number (>127) or
less than the minimum possible
number (<-128) that can be
represented in two’s complement
form; following logical operations, this
flag is set to 0
R
Y
2
H
R/W
X
1
F2
R/W
X
0
F1
R/W
X
57

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