Z86D99 ZILOG [Zilog, Inc.], Z86D99 Datasheet - Page 71

• Manufacturer Part Number: Z86D99
• Description: Low-Voltage Micro controllers with ADC
• Manufacturer: ZILOG [Zilog, Inc.]

PS003807-1002
Bit
Bit/Field
R/W
Reset
R = Read, W = Write, X = Indeterminate
Bit
Position
76______
__5_____
___43__0
_____2__
______1_
Interrupt Priority Register (IPR)
The IPR, as described in Table 22, is a write-only register that sets priorities for
the vectored interrupts in order to resolve simultaneous interrupt requests. There
are 48 sequence possibilities for interrupts. The six interrupts, IRQ
divided into three groups of two interrupt requests each, as follows:
•
•
•
)
Table 22. IPR (Group/Bank 0Fh, Register 9)
Priorities can be set both within and between groups using the IPR. Bits 1, 2, and
5 of the IPR define the priority of individual members within the groups. Bits 0, 3,
and 4 are encoded to define six priority orders between the three groups. Bits 6
and 7 are reserved.
Group A consists of IRQ
Group B consists of IRQ
Group C consists of IRQ
7
Reserved
W
0
Bit/Field
Reserved
Grp A Priority:
IRQ
Interrupt Group
Priority
Grp B Priority:
IRQ
Grp C Priority:
IRQ
3
0
1
and IRQ
and IRQ
and IRQ
P
6
W
0
R
5
2
4
E
3
0
1
L
5
Grp A
IRQ3_5 Int_Group
W
0
R/W
W
W
W
W
W
and IRQ
and IRQ
and IRQ
I
M
Z86D990/Z86D991 OTP and Z86L99X ROM
5
2
4
4
W
0
Value
X
1
0
111
110
101
100
011
010
001
000
1
0
1
0
I
Low-Voltage Microcontrollers with ADC
N
A
3
W
0
Description
No Effect
IRQ
IRQ
Reserved
B>A>C
C>B>A
B>C>A
A>C>B
A>B>C
C>A>B
Reserved
IRQ
IRQ
IRQ
IRQ
R
3
5
0
2
4
1
>IRQ
>IRQ
>IRQ
>IRQ
>IRQ
>IRQ
Y
2
Grp B
IRQ0_2
W
0
5
3
2
0
1
4
(Group A)
(Group B)
(Group C)
1
Grp C
IRQ1_4
W
0
0
to IRQ
0
Int_
Group
W
0
5
, are
64