Z86D99 ZILOG [Zilog, Inc.], Z86D99 Datasheet - Page 45

• Manufacturer Part Number: Z86D99
• Description: Low-Voltage Micro controllers with ADC
• Manufacturer: ZILOG [Zilog, Inc.]

PS003807-1002
Load and Enable Count Bits
Setting the Load bit D
counter/timer registers into their respective down-counters. The next internal clock
resets bit D
ues can be loaded into the down-counters at any time. If the counter/timer is run-
ning, the counter/timer continues to run and starts the count over with the initial
value. Therefore, the Load bit actually functions as a software re-trigger.
The T
enable counting, the Enable Count bit D
when the Enable Count bit is written by an instruction. The first decrement occurs
four internal clock periods after the Enable Count bit has been set.
The Load and Enable Count bits can be set at the same time. For example, using
the instruction
PRE
after the M2T2 machine state after the operand is fetched as shown in Figure 23.
Figure 23. Starting the Count
Prescaler Operations
During counting, the programmed clock source drives the prescaler 6-bit counter.
The counter is counted down from the value specified by bits D
sponding prescaler register, PRE
counter reaches its end-of-count, the initial value is reloaded and counting contin-
ues. The prescaler never actually reaches zero. For example, if the prescaler is
set to divide by three, the count sequence is as follows:
#03 is fetched
T
1
3-2-1-3-2-1-3-2...
1
1
and T
M
T
counter/timer remains at rest as long as the Enable Count bit D
2
3
2
T
1
to
3
are loaded into their respective counters, and the count is started
OR TMR #%0C
0
, readying the Load bit for the next load operation. The initial val-
T
1
P
2
M
T
R
2
to
1
E
1
T
transfers the initial values in the prescaler and the
3
sets both D
L
TMR is written;
T
I
counter/timers
0
1
are loaded
or PRE
M
Z86D990/Z86D991 OTP and Z86L99X ROM
M
T
2
2
I
Low-Voltage Microcontrollers with ADC
3
2
must be set to
and D
N
1
T
3
(Figure 24). When the prescaler
A
3
T
R
1
of TMR to
Y
M
T
first decrement
2
n
clocks later
occurs four
1
. Counting actually starts
T
3
1
. The initial values of
2
–D
7
of the corre-
3
is
0
. To
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