Z86D99 ZILOG [Zilog, Inc.], Z86D99 Datasheet - Page 73

• Manufacturer Part Number: Z86D99
• Description: Low-Voltage Micro controllers with ADC
• Manufacturer: ZILOG [Zilog, Inc.]

PS003807-1002
Note:
Whenever a power-on reset is executed, the IRQ is reset to
Before the IRQ accepts requests, it must be enabled by executing an enable inter-
rupts instruction.
For polled processing, IRQ must be initialized by an EI instruction. To properly ini-
tialize the IRQ, the following code is provided:
IMR is cleared before the IRQ enabling sequence to ensure no unexpected inter-
rupts occur when EI is executed. This code sequence must be executed before
programming the application required values for IPR and IMR.
I/O Port Control Registers
Each of the four ports (Ports 2, 4, 5, and 6) has an input register, an output regis-
ter, and an associated buffer and control logic. Because there are separate input
and output registers associated with each port, writing bits defined as inputs
stores the data in the output register. This data cannot be read as long as the bits
are defined as inputs. However, if the bits are reconfigured as output, the data
stored in the output register is reflected on the output pins and can then be read.
This mechanism allows the user to initialize the outputs before driving their loads.
CLR
EI
DI
IRQ is always cleared to
first EI instruction that enables the IRQ to be read/write. Setting
the Global Interrupt Enable bit in the Interrupt Mask Register
(IMR bit 7) does not enable the IRQ. Execution of an EI
instruction is required.
IMR
; make sure vectored interrupts are disabled
; enable IRQ, otherwise it is read only
; not necessary, if interrupts were previously
; enabled
; disable interrupt handling
P
R
E
L
I
00h
M
Z86D990/Z86D991 OTP and Z86L99X ROM
and is in read-only mode until the
I
Low-Voltage Microcontrollers with ADC
N
A
R
Y
00h
and disabled.
66