TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 62
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TSC80251
Manufacturer Part Number
TSC80251
Description
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet
1.TSC80251.pdf
(219 pages)
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Rev. C – May 7, 1999
Notes:
1.
2.
3.
4.
Absolute call
Extended call
Long call
Return from subroutine
Extended return from subroutine
Return from interrupt
Trap interrupt
ACALL
ECALL
ECALL
LCALL
LCALL
RET
ERET
RETI
TRAP
Mnemonic
Mnemonic
A shaded cell denotes an instruction in the C51 Architecture.
In internal execution only, add 1 to the number of states if the destination/return address is internal and odd.
Add 2 to the number of states if the destination address is external.
Add 5 to the number of states if INTR= 1.
addr11
@DRk
addr24
@WRj
addr16
<src>
<dest>,
<dest>,
(1)
Table 5.21. Summary of Call and Return Instructions
Absolute subroutine call
Extended subroutine call (indirect)
Extended subroutine call
Long subroutine call (indirect)
Long subroutine call
Return from subroutine
Extended subroutine return
Return from interrupt
Jump to the trap interrupt vector
ACALL <src>
ECALL <src>
LCALL <src>
RET
ERET
RETI
TRAP
Comments
Comments
(PC)
(PC)
(PC)
(PC)
(PC)
(PC)
pop (PC)
pop (PC)
IF [INTR= 0] THEN pop (PC)
IF [INTR= 1] THEN pop (PC)
(PC)
IF [INTR= 0] THEN push (PC)
IF [INTR= 1] THEN push (PSW1); push (PC)
10:0
23:0
15:0
(PC) +2; push (PC)
(PC) + size (instr); push (PC)
(PC) + size (instr); push (PC)
(PC) + size (instr);
15:0
23:0
src opnd
src opnd
src opnd
Bytes
Binary Mode
2
3
5
3
3
1
3
1
2
TSC80251
14
14
10
States
9
9
7
12
(2)(3)
(2)(3)
7
9
(2)(4)
15:0
(2)(3)
(2)(3)
(2)(3)
(2)
(2)
(4)
15:0
23:0
;
15:0
; pop (PSW1)
Bytes
Source Mode
23:0
15:0
2
2
4
2
3
1
2
1
1
;
;
13
13
States
9
9
9
7
11
23:0
(2)(3)
(2)(3)
(2)(3)
7
8
(2)(4)
(2)(3)
(2)(3)
(2)
(2)
(4)
5.17