TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 65

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

TSC80251
Notes :
1. The CMP operation does not supPort DRk, direct16.
2. For the ORL, ANL and XRL operations, neither reg nor op2 can be DRk.
5.20
Note :
1. For this instruction, the only valid operation is MOV.
MOV DRk(h), #data16
MOV DRk, #1data16
CMP DRk,#1data16
Oper DRk, dir16
Oper WRj, #data16
Oper DRk, #data16
Oper WRjd, WRjs
Oper DRkd, DRks
Oper Rm, @WRj
Oper Rm, @DRk
Oper WRj, dir16
Oper Rmd, Rms
Oper Rm, #data
Oper WRj, dir8
Oper DRk, dir8
Oper Rm, dir16
Oper Rm, dir8
Instruction
B
A
x
2
9
4
5
6
7
8
(1)
ADD reg, op2
SUB reg, op2
CMP reg, op2
ORL reg, op2
ANL reg, op2
XRL reg, op2
MOV reg, op2
DIV reg, op2
MUL reg, op2
Table 5.25. High Nibble, Byte 0 of Data Instructions
Operation
(2)
(2)
(2)
(1)
Table 5.24. Data Instructions
B
x
x
x
x
x
x
7
7
x
x
x
x
x
x
x
x
Byte 0
Two modes only:
C
D
A
F
E
E
E
E
E
E
E
E
E
E
E
E
E
reg op2 = Rmd Rms
reg, op2 = Rmd, Rms
reg, op2 = Wjd, Wjs
All data addressing modes are supported.
kd/4
jd/2
md
k/4
k/4
k/4
k/4
j/2
j/2
j/2
m
m
m
m
m
Byte 1
ks/4
js/2
ms
D
C
B
0
4
8
1
5
3
7
F
9
Notes
#data
#data (high)
#data (high)
#data (high)
dir8 addr
dir8 addr
dir8 addr
dir16 addr (high) dir16 addr (low)
dir16 addr (high) dir16 addr (low)
dir16 addr (high) dir16 addr (low)
k/4
j/2
Byte 2
0
0
Rev. C – May 7, 1999
#data (low)
#data (low)
#data (low)
Byte 3