SX18AA100-I/DP ETC [List of Unclassifed Manufacturers], SX18AA100-I/DP Datasheet - Page 24

• Manufacturer Part Number: SX18AA100-I/DP
• Description: Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug
• Manufacturer: ETC [List of Unclassifed Manufacturers]

SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
10.2 Watchdog Timer
The watchdog logic consists of a Watchdog Timer which
shares the same 8-bit programmable prescaler with the
RTCC. The prescaler actually serves as a postscaler if
used in conjunction with the WDT, in contrast to its use as
a prescaler with the RTCC.
10.3 The Prescaler
The 8-bit prescaler may be assigned to either the RTCC
or the WDT through the PSA bit (bit 3 of the OPTION reg-
ister). Setting the PSA bit assigns the prescaler to the
WDT. If assigned to the WDT, the WDT clocks the pres-
caler and the prescaler divide rate is selected by the
PS0, PS1, and PS2 bits located in the OPTION register.
Clearing the PSA bit assigns the prescaler to the RTCC.
Once assigned to the RTCC, the prescaler clocks the
RTCC and the divide rate is selected by the PS0, PS1,
and PS2 bits in the OPTION register. The prescaler is not
mapped into the data memory, so run-time access is not
possible.
The prescaler cannot be assigned to both the RTCC and
WDT simultaneously.
© 2000 Scenix Semiconductor, Inc. All rights reserved.
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8-Bit Prescaler
WDT
MUX (8 to 1)
Figure 10-1. RTCC and WDT Block Diagram
WDT Time-out
MUX
WDTE (from FUSE Word)
MUX
M
U
X
M
U
X
Data Bus
RTCC
F
RTCC pin
OSC
8-Bits
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RTCC Rollover
Interrupt
RTE_ES
Interrupt
OPTION
RTE_IE
Register
RTCC
Enable
RTW
RST
PSA
PS2
PS1
PS0