SX18AA100-I/DP ETC [List of Unclassifed Manufacturers], SX18AA100-I/DP Datasheet - Page 28

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SX18AA100-I/DP

Manufacturer Part Number
SX18AA100-I/DP
Description
Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
Figure 12-3
sequence where the MCLR and V
together. The V
out period expires. In this case, the device will receive a
proper reset. However, Figure 12-4 depicts a situation
where V
time-out prior to V
level (V
reset and start operating with the supply voltage not at a
valid level. In this situation, it is recommended that you
use the external RC circuit shown in Figure 12-5. The RC
delay should exceed the time period it takes V
a valid operating voltage
© 2000 Scenix Semiconductor, Inc. All rights reserved.
drt_time_out
Figure 12-3. Time-out Sequence on Power-up
Figure 12-4. Time-out Sequence on Power-up
drt_time_out
(MCLR tied to V
dd
dd
RESET
RESET
(MCLR tied to V
MCLR
MCLR
min). This means the device will come out of
rises too slowly. In this scenario, the DRT will
POR
POR
V
V
dd
dd
shows
dd
signal is stable before the DRT time-
dd
Tdrt
Tdrt
reaching a valid operating voltage
the
dd
dd
): Fast V
on-chip
): Slow Rise Time
V1
dd
Power-On
Rise Time
dd
pins are tied
dd
to reach
Reset
- 28 -
Note 1: The external Power-On Reset circuit is required
only if V
charge the capacitor quickly when V
Note 2: R < 40 k
voltage drop across R does not violate the device electri-
cal specifications.
Note 3: R1 = 100
into MCLR from external capacitor C. This helps prevent
MCLR pin breakdown due to Electrostatic Discharge
(ESD) or Electrical Overstress (EOS).
13.0 BROWN-OUT DETECTOR
The on-chip brown-out detection circuitry resets the
device when V
age. The device is held in reset as long as V
below the brown-out voltage. The device will come out of
reset when V
brown-out level is preset to approximately 4.2V at the
factory. The brown-out circuit can be disabled through
BOR0 and BOR1 bits contained in the FUSEX Word reg-
ister.
Figure 12-5. External Power-On Reset Circuit
D
dd
V
dd
power-up is too slow. The diode D helps dis-
dd
dd
(For Slow V
rises above the brown-out voltage. The
dips below the specified brown-out volt-
C
R
is recommended to make sure that
to 1k
R1
dd
will limit any current flowing
Power-up)
MCLR
dd
powers down.
www.scenix.com
dd
stays

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