SX18AA100-I/DP ETC [List of Unclassifed Manufacturers], SX18AA100-I/DP Datasheet - Page 29

• Manufacturer Part Number: SX18AA100-I/DP
• Description: Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug
• Manufacturer: ETC [List of Unclassifed Manufacturers]

initialized to an unknown value.
14.0 REGISTER STATES UPON
DIFFERENT RESET OPERATIONS
The effect of different reset operation on a register
depends on the register and the type of reset operation.
Some registers are initialized to specific values, some
are left unchanged, some are undefined, and some are
© 2000 Scenix Semiconductor, Inc. All rights reserved.
W
OPTION
MODE
RTCC (01h)
PC (02h)
STATUS (03h)
FSR (04h)
RA/RB/RC
Direction
RA/RB/RC Data
Other File Registers -
SRAM
CMP_B
WKPND_B
WKED_B
WKEN_B
ST_B/ST_C
LVL_A/LVL_B/LVL_C
PLP_A/PLP_B/PLP_C
Watchdog Counter
NOTE:
NOTE:
Register
1. Watchdog reset during power down mode: 00 (TO, PD)
2. External reset during power down mode: 10 (TO, PD)
Watchdog reset during Active mode: 01 (TO, PD)
External reset during Active mode: Unchanged (TO, PD)
Undefined
FFh
0Fh
Undefined
FFh
Bits 0-2: Unde-
fined
Bits 3-4: 11
Bits 5-7: 000
Undefined
FFh
Undefined
Undefined
Bits 0, 6-7: 1
Bits 1-5: Unde-
fined
Undefined
FFh
FFh
FFh
FFh
FFh
Undefined
Power-On
Table 14-1. Register States Upon Different Resets
Unchanged
Bits 0-6: Un-
Unchanged
Unchanged
FFh
0Fh
FFh
Bits 0-2: Un-
changed.
Bits 3-4: Unch.
Bits 5-7: 000
changed
Bit 7: 1
FFh
Unchanged
Bits 0, 6-7: 1
Bits 1-5: Unde-
fined
Unchanged
FFh
FFh
FFh
FFh
FFh
Unchanged
Wakeup
- 29 -
A register that starts with an unknown value should be
initialized by the software to a known value; you cannot
simply test the initial state and rely on it starting in that
state consistently.
Table 14-1 lists the SX registers and shows the state of
each register upon different reset.
SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
0Fh
Undefined
Undefined
Undefined
Undefined
FFh
FFh
Bits 0-4: Unde-
fined
Bits 5-7: 000
Bits 0-6: Unde-
fined
Bit 7: 1
FFh
Bits 0, 6-7: 1
Bits 1-5: Unde-
fined
Undefined
FFh
FFh
FFh
FFh
FFh
Undefined
Brown-out
Unchanged
FFh
0Fh
Unchanged
FFh
Bits 0-2: Un-
changed
Bits 3-4: (Note 1)
Bits 5-7: 000
Bits 0-6: Un-
changed
Bit 7: 1
FFh
Unchanged
Unchanged
Bits 0, 6-7: 1
Bits 1-5: Unde-
fined
Unchanged
FFh
FFh
FFh
FFh
FFh
Unchanged
Watchdog
Timeout
Unchanged
FFh
0Fh
Unchanged
FFh
Bits 0-2: Un-
changed
Bits 3-4: (Note 2)
Bits 5-7: 000
Bits 0-6: Un-
changed
Bit 7: 1
FFh
Unchanged
Unchanged
Bits 0, 6-7: 1
Bits 1-5: Unde-
fined
Unchanged
FFh
FFh
FFh
FFh
FFh
Unchanged
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